Optical Data Memory Bank Layout for Faster Error Correction Access

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Solution Overview

Problem

Conventional optical disk accessing and transferring apparatuses face inefficiencies due to the need for frequent page-crossing accesses, which reduce data access speed and increase the time required for decoding and transmission, especially when accessing data with different row addresses in dynamic random access memory (DRAM).

Innovation Solution

The apparatus incorporates a DRAM with a page-mode function and an alternate-bank-access function, allowing for simultaneous activation and charging of memory banks, thereby hiding the pre-charging and activation times by utilizing a burst length that exceeds the charging and preparation time, and using a SRAM to store and retrieve data efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional DRAM accessing method is used, then data can be stored and retrieved, but frequent page-crossing accesses reduce access speed and increase decoding time

Engineering Contradiction:
Improvedata access speedVSAvoiddecoding time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent segments the DRAM into multiple memory banks (e.g., Bank 0, Bank 1, Bank 2, Bank 3) and further divides each bank into logical memory sections. This segmentation allows parallel access to different banks simultaneously, eliminating the need for sequential page-crossing accesses and reducing both access time and decoding time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent pre-charges and activates memory banks in advance before they are needed for data access. By performing these preparatory actions beforehand, the system eliminates waiting time during actual data retrieval operations, thereby improving access speed and reducing overall decoding time.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If page-mode function is used, then data access within same row is efficient, but switching between different row addresses requires pre-charging time

Engineering Contradiction:
Improvedata transfer speedVSAvoidpre-charge time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system pre-charges memory banks before they are needed for data access. By performing the pre-charge operation in advance, the actual data transfer can proceed without waiting for pre-charge time, thereby maintaining high productivity while eliminating the time loss associated with row address switching.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent ensures continuous data transfer operations by overlapping pre-charge operations with useful data access operations in other banks. This allows the system to maintain continuous productive action without idle waiting periods, effectively hiding the pre-charge time overhead.

Inventive Principle:
Principle #20Continuity of useful action

3Speed

If multiple memory banks are activated simultaneously, then parallel access is enabled, but activation and pre-charging time is required

Engineering Contradiction:
Improveaccess speedVSAvoidactivation time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent activates and pre-charges memory banks in advance before they are needed for data access. By performing these activation operations beforehand, the system enables parallel access to multiple banks without incurring activation time delays during actual data retrieval, thereby improving access speed while eliminating the time penalty of simultaneous activation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7523376B2Apparatus for accessing and transferring optical data
Publication Date: 2009.04.21 MEDIATEK INC
  • US7523376B2 patent drawing
  • US7523376B2 patent drawing
  • US7523376B2 patent drawing

AI summary

An accessing/transferring apparatus has a first memory having multiple memory banks, each of the memory banks having multiple logical memory sections, each of the logical memory sections forming a memory matrix; a memory controller that uses the page-mode function or alternate-bank-access function of the first memory to write the data of the error correction block into the logical memory sections along a column direction; and an error correction decoder using the page-mode function or alternate-bank-access function of the first memory to access the data of the error correction block from the logical memory sections along the row direction. The present invention uses the features of a dynamic random access memory (DRAM), such as page-mode function and alternate-bank-access function, and the data arrangement of the memory to improve the access speed of the memory to increase the accessing efficiency of optical data.