Optical Engine DC BIST for Early Chip-to-Chip Connectivity Testing

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Solution Overview

Problem

Conventional chip-to-chip connectivity testing in advanced electronic packaging, particularly in high-density applications like IPO and optical engines, is costly due to the use of expensive optical modules, leading to waste if faults are detected post-assembly.

Innovation Solution

Implementing a built-in-self-test (BIST) method that performs direct current (DC) connectivity testing between integrated circuits without the need for optical assemblies, allowing testing at earlier stages and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If expensive optical modules are used for chip-to-chip connectivity testing, then testing capability is achieved, but testing cost increases significantly

Engineering Contradiction:

Improveconnectivity testing capabilityVSAvoidtesting cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates an electrical test model that copies the functionality of optical connectivity testing using electrical signals instead of optical signals. The test circuitry replicates the essential testing capability through electrical domains, avoiding the need for expensive optical modules while maintaining testing effectiveness for connectivity verification.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent substitutes the optical testing system with an electrical testing system. By replacing optical components (lasers, photodetectors, optical fibers) with electrical circuitry, the system achieves the same connectivity testing function through electrical domains, dramatically reducing cost and complexity.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If optical components are assembled into the package before testing, then complete package testing is possible, but waste increases if faults are detected

Engineering Contradiction:

Improvepackage testing completenessVSAvoidwaste of optical components

Core Design Contradiction:

ReliabilityVSLoss of substance

Solution Approach 1:

The patent performs connectivity testing at an intermediate stage in the manufacturing process, before final package assembly with optical components. By conducting electrical tests on the substrate and ICs beforehand, faults are identified early, preventing unnecessary assembly of optical components into defective packages and eliminating waste.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent divides the testing process into separate stages: electrical connectivity testing performed on the substrate/IC level before optical assembly, followed by optical component integration only for packages that pass the electrical tests. This segmentation allows early elimination of defective units without exposing optical components to unnecessary risk.

Inventive Principle:

Principle #1Segmentation

3Ease of manufacture

If DC BIST method is used for connectivity testing, then testing cost is reduced, but testing coverage may be limited

Engineering Contradiction:

Improvetesting costVSAvoidtesting coverage

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent designs the electrical test circuitry to perform multiple testing functions through a unified DC BIST approach. The same test circuit can verify connectivity, detect open/short faults, and characterize electrical parameters across different test scenarios, achieving comprehensive coverage without requiring separate expensive optical test systems.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables cost-effective DC connectivity testing before expensive optical components are assembled, minimizing waste and reducing testing costs by identifying faults early in the manufacturing process.

Implementation Method 1

controlling one or more switches in the first IC to configure a bias direction of a photodiode of the second IC

Methodology Applied

Scientific EffectPhotoelectric Effect: Photoelectric Effect

Data Source

PatentUS12487275B2Enhanced direct current (DC) built-in-self-test (BIST) coverage for optical engines and advanced packaging

Publication Date: 2025.12.02 CISCO TECHNOLOGY INC

AI summary

Techniques for testing connectivity between a first integrated circuit (IC) and a second IC of an electronics package are described. An example technique involves controlling a switch(es) in the first IC to configure a bias direction of a photodiode of the second IC to forward biased. A connectivity test between the first and second ICs is performed, when the photodiode is forward biased. Another technique involves controlling a switch(es) in the first IC to configure a bias direction of a photodiode in the second IC to reverse biased. A first voltage is measured at an input of a transimpedance amplifier (TIA) in the first IC when the photodiode is reverse biased. The switch(es) are controlled to change the bias direction of the photodiode to forward biased. A second voltage is measured at the input of the TIA when the photodiode is forward biased.