Optical Interposer Waveguide Layout for Interference-Free Chip Links

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Solution Overview

Problem

Existing chip connection methods using metal wiring are inadequate for fast and energy-efficient signal transmission due to damage risks in small-scale fiber structures and interference issues.

Innovation Solution

An optical interposer with a first and second total internal reflective layer and a waveguide is used to connect photonic integrated circuit chips, allowing light signals to perform repetitive total internal reflections and zigzag transmission, utilizing tilted reflective surfaces for emission and reflection between chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If fiber structure is used for chip connection to achieve fast and energy-saving transmission, then transmission speed and energy efficiency are improved, but the fiber structure may be damaged due to polishing and cutting steps in manufacturing

Engineering Contradiction:
Improvetransmission speedVSAvoidfiber structure integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent replaces mechanical fiber processing (polishing and cutting) with semiconductor manufacturing processes (etching and growing). This substitution eliminates the damage risk to the fiber structure by using compatible manufacturing techniques that form the waveguide structure without requiring mechanical manipulation of delicate fiber elements.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the manufacturing approach from mechanical processing to semiconductor fabrication processes. By using etching and growing techniques, the waveguide structure is formed with precise control over geometry and material properties, avoiding the damage caused by traditional fiber polishing and cutting while maintaining the necessary optical properties for fast transmission.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple optical interposers are arranged to connect multiple chip nodes, then connection capacity is improved, but light signal interference may occur between adjacent interposers

Engineering Contradiction:
Improveconnection capacityVSAvoidlight signal interference
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent arranges multiple optical interposers in an interleaved pattern, utilizing spatial dimensionality to separate the light transmission paths. This dimensional arrangement allows multiple interposers to be positioned closely together while maintaining sufficient separation to prevent optical interference between adjacent structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the connection system into multiple independent optical interposer units, each handling specific node connections. This segmentation allows parallel processing of multiple signal transmission paths while maintaining isolation between them through the interleaved layout, preventing cross-talk and interference.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Facilitates fast and energy-saving signal transmission between photonic integrated circuit chips without interference, leveraging semiconductor manufacturing processes to create a fiber-like structure for efficient coupling.

Implementation Method 1

The refractive indices of the first total internal reflective layer and the second total internal reflective layer are smaller than the refractive index of the waveguide, allowing a light signal to perform repetitive total internal reflections at the junctions between materials and advance in a zigzag shape within the waveguide

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Implementation Method 2

allowing the light signal to be emitted upwards from the first photonic integrated circuit chip, totally reflected through the first tilted reflective surface and transmitting forward, and then totally reflected downwards through the second tilted reflective surface and entering the second photonic integrated circuit chip

Methodology Applied
Scientific EffectTotal reflection: Reflection

Data Source

PatentUS12468098B2Optical interposer for chip connection
Publication Date: 2025.11.11 FOCI FIBER OPTIC COMM
  • US12468098B2 patent drawing
  • US12468098B2 patent drawing

AI summary

The present invention provides an optical interposer for chip connection including a first total internal reflective layer, a waveguide and a second total internal reflective layer. The optical interposer is disposed above a first photonic integrated circuit chip and a second photonic integrated circuit chip, coupling with the first photonic integrated circuit chip and the second photonic integrated circuit chip. The refractive indices of the first total internal reflective layer and the second total internal reflective layer are lower than the waveguide, making a light signal perform repetitive total internal reflections at the junctions between materials and advance in a zigzag shape within the waveguide, and further transmit between the first photonic integrated circuit chip and the second photonic integrated circuit chip.