Optical Waveguide Memory Using Photon Avalanche Carrier Trapping
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Solution Overview
Problem
Implementing non-volatile optical storage devices on photonic integrated circuits (PICs) is challenging due to weak photon interactions and the need for OEO conversions, which have not been effectively addressed by existing technologies, and existing technologies have not adequately addressed the integration of optical storage devices into conventional computing systems.
Innovation Solution
A non-volatile optical storage device comprising a crystalline semiconductor layer disposed on a substrate, which comprises a non-volatile optical storage device comprising a crystalline semiconductor layer and an amorphous layer, with a PN junction and a power source to induce a photon avalanche effect for carrier trapping, enabling non-volatile optical storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If optical storage devices are implemented on photonic integrated circuits, then computing performance and energy efficiency are improved, but device complexity and integration difficulty increase
Solution Approach 1:
The patent combines optical waveguide technology with semiconductor memory structures to create an integrated optical storage device. The optical waveguide is formed within a semiconductor substrate, merging optical transmission capabilities with electronic manufacturing processes, thereby reducing integration complexity while maintaining energy efficiency benefits
Solution Approach 2:
The optical storage device is designed to perform multiple functions: data storage, optical signal transmission, and potential data processing. This multi-functionality reduces the need for separate components, simplifying overall system integration while delivering improved computing performance and energy efficiency
2Stability of the object's composition
If photon avalanche effect is used for carrier trapping, then non-volatile storage capability is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes changes in optical parameters (wavelength, intensity) and electrical parameters (voltage, current) to control the photon avalanche effect. By carefully managing these parameters during operation, the system achieves reliable non-volatile storage without requiring extremely tight manufacturing tolerances, as the effect can be triggered and controlled through parameter adjustment rather than relying solely on precise physical dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves cost-efficient, high-yield integration of non-volatile optical storage on PICs, minimizing OEO conversions and enhancing computing performance by leveraging traditional silicon foundry processes.
Implementation Method 1
A first voltage bias is supplied to the PN junction while an input optical signal is input into the optical waveguide, causing a photon-induced avalanche effect that increases a concentration of free charge carriers in the optical waveguide
Data Source
AI summary
Systems and methods are provided for non-volatile optical storage devices that leverage photon avalanche-induced carrier trapping in semiconductor materials. Examples herein include a crystalline semiconductor layer disposed on a substrate and an amorphous layer disposed on the crystalline semiconductor layer. The crystalline semiconductor layer comprises an optical waveguide and a PN junction formed in the optical waveguide. An optical source is configured to emit light of a wavelength into the optical waveguide and a power source is configured to supply a first voltage bias across the PN junction that causes an amplitude of optical power of light emitted from the optical waveguide to change from a first amplitude to a second amplitude. The optical waveguide emits light at the second amplitude while the first voltage bias is supplied and after the first voltage bias is removed.