Optical Semiconductor Electrode Layout for Stable Solder Connection
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Solution Overview
Problem
Light emitting elements face challenges in stable connection to external members via solder and ensuring satisfactory current flow, with issues like solder erosion and increased electrical resistance due to wiring layer configurations.
Innovation Solution
An optical semiconductor element design featuring a substrate with first and second cells, where the first wiring layer is spaced apart from the electrode, and a contact region with a specific width to reduce solder diffusion and electrical resistance, while maintaining stable solder connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the first wiring layer is spaced apart from the first electrode, then solder diffusion into the wiring layer is suppressed, but electrical resistance increases
Solution Approach 1:
The patent applies local quality by creating a contact region with specific local characteristics: the first wiring layer is spaced apart from the first electrode in most areas to prevent solder diffusion, but in the contact region, the wiring layer directly contacts the electrode to reduce electrical resistance. This localized variation in the wiring layer's position and function resolves the contradiction between preventing solder diffusion and maintaining low electrical resistance.
2Manufacturing precision
If the contact region width is increased, then electrical resistance is reduced, but the area occupied by the wiring layer increases
Solution Approach 1:
The patent applies partial action by creating a contact region that is sufficient to achieve the desired electrical resistance reduction, but not excessively large. The contact region width is specifically designed to be equal to or greater than the opening width, which is the minimum necessary dimension to achieve satisfactory electrical connection while minimizing the area occupied by the wiring layer.
3Reliability
If solder is used to connect the electrode to external members, then stable electrical connection is achieved, but solder erosion and diffusion occur
Solution Approach 1:
The patent applies the extraction principle by removing the harmful effect of solder diffusion through spatial separation. The first wiring layer is positioned at a distance from the first electrode, effectively extracting or removing the wiring layer from the zone where solder diffusion occurs during the soldering process. This prevents solder from reaching and damaging the wiring layer while still allowing stable electrical connection through the contact region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enables stable connection to external members by solder and ensures satisfactory current flow by reducing solder diffusion and electrical resistance through strategic wiring layer placement and contact region width optimization.
Implementation Method 1
a phenomenon (solder erosion, solder corrosion) in which the solder diffuses into the first electrode may occur. However, since the first wiring layer is spaced apart from the first electrode, the diffusion of solder can be restrained at the first electrode.
Implementation Method 2
the first wiring layer is spaced apart from the first electrode on the top surface of the first cell, and is electrically connected to the first electrode via the first semiconductor layer
Data Source
AI summary
An optical semiconductor element includes a substrate, a first termination cell, and a cell. A first electrode is arranged on the top surface of the first termination cell. The first termination cell and the cell are connected to each other by a wiring layer extending from the top surface of the first termination cell to the cell. The first electrode is exposed to the outside through an opening formed in an insulating layer. The wiring layer is spaced apart from the first electrode on the top surface of the first termination cell, and is electrically connected to the first electrode via a first semiconductor layer. The first portion has a contact region in contact with the first semiconductor layer. The width of the contact region is equal to or greater than the width of the opening.