Optical Transceiver Configuration Update via Shared Bus

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Solution Overview

Problem

Existing optical transceivers face challenges in updating configuration data without increasing the number of components, particularly in high-functionality and miniaturized systems, where efficient communication and reconfiguration are necessary for performance improvement and functionality enhancement.

Innovation Solution

The optical transceiver incorporates a Management Data Input/Output (MDIO) interface, a reconfigurable logic device, a microcontroller, and separate communication buses to enable the updating of configuration data from an external device, allowing the microcontroller to read and write configuration data to memory and the logic device, facilitating reconfiguration without the need for additional switching circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If configuration data is updated using traditional methods with switching circuits, then the logic device can be reconfigured, but the number of components increases and device complexity rises

Engineering Contradiction:
Improvereconfigurability of logic deviceVSAvoidnumber of components
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the switching circuit functionality from the system by directly connecting the first communication bus to the logic device, eliminating the need for separate switching circuits while maintaining the ability to update configuration data. This reduces component count while preserving reconfigurability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The first communication bus is designed to serve multiple functions: it connects the microcontroller to both the first memory and the logic device, enabling configuration data transmission to both components through a single shared bus structure. This multi-functionality eliminates the need for separate dedicated buses for each component.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If separate communication buses are used for memory and logic device, then data transmission is simplified, but the number of components and wiring increases

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidnumber of communication buses
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The first communication bus is designed as a universal interface that can communicate with both the first memory and the logic device. The microcontroller uses this single bus to perform read operations with memory and write operations with the logic device, eliminating the need for separate dedicated buses while maintaining full data transmission capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the communication interfaces by connecting the first communication bus directly to both the first memory and the logic device, combining what would traditionally require separate buses into a single shared communication path. This reduces wiring complexity while maintaining operational simplicity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the optical transceiver is deactivated for firmware updates, then configuration data can be rewritten safely, but continuous operation is interrupted

Engineering Contradiction:
Improvefirmware update safetyVSAvoidcontinuous operation time
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The system performs preliminary verification of configuration data integrity before and during the update process. The microcontroller reads and validates the new configuration data from the first memory before writing it to the logic device, ensuring update safety while allowing the system to remain operational throughout the process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first communication bus acts as an intermediary that enables safe configuration data transmission without requiring system deactivation. The bus facilitates controlled data transfer with verification mechanisms, allowing firmware updates to proceed safely while the optical transceiver continues normal operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10447401B2Optical transceiver and upgrading method of the same
Publication Date: 2019.10.15 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US10447401B2 patent drawing
  • US10447401B2 patent drawing
  • US10447401B2 patent drawing

AI summary

An optical transceiver including a MDIO interface, a logic device, a first memory, a first bus, a second bus, and a microcontroller. The logic device includes configuration data and an internal circuit reconfigurable according to the configuration data, and is electrically connected to the second bus. The first memory is configured to store the configuration data and electrically connected to the first bus. The microcontroller is configured to receive new configuration data from the external device through the MDIO interface and write the new configuration data to the first memory through the first bus for rewriting the configuration data in the case of receiving an update command from the external device, and configured to read the new configuration data stored in the first memory through the first bus and send the new configuration data to the logic device through the second bus in the case that the optical transmitter is activated.