Optical Transceiver Timing Integration for Phase Synchronization
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Solution Overview
Problem
The complexity and cost of data transfer networks are increased due to the need for compatibility among different units to implement timing protocols, such as IEEE 1588, which requires handling of time stamps and phase difference calculations across multiple units in a phase synchronized loop.
Innovation Solution
A transceiver unit for both slave and master ends of a phase synchronized loop that includes an optoelectronic transmitter and receiver, electrical connectors, and a processor to encode and decode bit streams with time stamps, allowing for the calculation of phase differences without the need for a physical media interface circuit, thus simplifying the distribution of clock-time information across network elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If timing protocols are implemented across multiple interconnected units (transceiver unit and CPU), then the timing protocol functionality is achieved, but the device complexity and cost increase
Solution Approach 1:
The patent merges the timing protocol processing functions into a single transceiver unit by integrating the processor that handles time stamping and phase difference calculations directly into the transceiver unit. This eliminates the need for separate interconnected units (transceiver unit and CPU) to work together, thereby reducing device complexity while maintaining timing protocol functionality.
2Reliability
If multiple interconnected units are used to handle time stamping and computations, then timing protocol operations are performed, but the price of the network element increases
Solution Approach 1:
The patent combines time stamping and phase difference calculation functions into the transceiver unit's integrated processor, eliminating the need for separate CPU units. This consolidation reduces the number of components required, thereby lowering production costs while maintaining full timing protocol operational capability.
3Measurement precision
If separate units handle time stamp and phase difference calculations, then timing synchronization is achieved, but the number of components and interfaces increases
Solution Approach 1:
The patent integrates the processor responsible for time stamping and phase difference calculations directly into the transceiver unit, consolidating multiple functions into a single unit. This eliminates the need for separate interconnected units, reducing the number of components and interfaces while maintaining measurement precision for phase difference calculations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the complexity and cost by eliminating the need for separate units to handle time stamps and phase difference calculations, enabling efficient clock-time synchronization within data transfer networks.
Implementation Method 1
an optoelectronic transmitter for producing, according to a transmission line-code, a first light signal carrying a bit stream to be transmitted
Implementation Method 2
an optoelectronic receiver for receiving a second light signal from the optical data transfer link and for detecting, according to a reception line-code, a received bit stream from the second light signal
Data Source
AI summary
A phase synchronized optical master-slave loop comprises at the slave-end a processor (105) configured to include a first timing signal into a bit stream to be transmitted to the master-end, detect a second timing signal from a bit stream received from the master-end, and calculate a phase difference between a regenerated phase signal and a reference phase signal on the basis of a transmission moment of the first timing signal, a first time-stamp indicating a reception moment of the first timing signal at the master-end, a reception moment of the second timing signal, and a second time-stamp indicating a transmission moment of the second timing signal from the master-end. The processor is configured to read the time stamps from the received bit stream that corresponds to a received light signal according to a reception line-code. Thus, conversion of data format is not necessary for the phase synchronization.