Optoelectronic Semiconductor Chip Transparent Encapsulation
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Solution Overview
Problem
Optoelectronic semiconductor chips face the risk of moisture ingress through the electrically insulating layer, leading to degradation of the mirror layer and reduced radiation yield, while maintaining efficient electrical contacting and minimizing manufacturing effort remains a challenge.
Innovation Solution
The optoelectronic semiconductor chip incorporates a transparent encapsulation layer covering the semiconductor layer sequence, mirror layer, and electrically insulating layer, using materials like aluminum oxide or silicon oxide, preferably deposited via atomic layer deposition (ALD) or spin-on glass, to prevent moisture ingress and ensure effective electrical contacting with minimal manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the electrically insulating layer is used to insulate the first and second electrical contact layers, then electrical insulation is achieved, but moisture can penetrate through the insulating layer to the mirror layer causing degradation
Solution Approach 1:
The patent applies nested encapsulation by placing the electrically insulating layer containing the electrical contact layers inside a transparent encapsulation layer. The transparent encapsulation layer completely encloses the insulating layer, creating a nested structure where the outer layer protects the inner layer from moisture while the inner layer maintains electrical insulation. This resolves the contradiction by adding protective encapsulation without compromising electrical insulation functionality.
2Reliability
If the mirror layer is exposed to moisture through edge transport, then the mirror layer degrades and radiation yield reduces, but adding protective layers increases device complexity
Solution Approach 1:
The transparent encapsulation layer serves multiple functions simultaneously: it protects the mirror layer from moisture ingress, encloses the electrically insulating layer to prevent moisture penetration through edges, and maintains the structural integrity of the semiconductor chip. By combining multiple protective functions into a single layer, the patent reduces device complexity while achieving comprehensive protection against moisture.
3Object-affected harmful factors
If the transparent encapsulation layer covers the electrically insulating layer, then moisture penetration is prevented, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the transparent encapsulation layer early in the manufacturing process, before final assembly steps. The encapsulation layer is deposited to completely cover the electrically insulating layer and extend to the edges of the semiconductor chip, preventing moisture penetration from the outset. This preliminary protective measure simplifies subsequent manufacturing steps by eliminating the need for additional moisture barrier applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively protects the mirror layer from moisture, preventing degradation and enhancing radiation yield by ensuring the electrically insulating layer is isolated from the surrounding medium, while allowing for efficient electrical contacting with reduced manufacturing effort.
Implementation Method 1
a transparent encapsulation layer which covers side faces of the semiconductor layer sequence, side faces of the mirror layer and side faces of the electrically insulating layer
Implementation Method 2
a mirror layer... Radiation which is emitted from the active zone in the direction of the carrier substrate is advantageously reflected by the mirror layer to the second main surface of the semiconductor layer sequence serving as a radiation coupling-out surface
Implementation Method 3
The first and second electrical contact layers are insulated from one another by an electrically insulating layer
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
The invention relates to an optoelectronic semiconductor chip comprising a semiconductor layer sequence (2) and a carrier substrate (10), wherein a first (7) and a second electrical contact layer (8) are arranged at least in some areas between the carrier substrate (10) and the semiconductor layer sequence (2) and are electrically insulated from each other by an electrically insulating layer (9), and having a mirror layer (6) arranged between the semiconductor layer sequence (2) and the carrier substrate (10). The semiconductor chip (1) comprises a transparent encapsulating layer (13) covering side surfaces (26) of the semiconductor layer sequence (2), side faces (16) of the mirror layer (6), and side surfaces (19) of the electrically insulating layer (9) facing toward the side surfaces (15) of the semiconductor chip (1).