Semiconductor Devices TRIZ Cases
- SiC AlGaN Heterojunction Diode Leakage Suppression
An n-type SiC and AlGaN heterojunction suppresses leakage current by optimizing the aluminum composition ratio in the second semiconductor layer.
- Vertical LED Current Blocking Layer for Voltage Stability
An oxide current blocking layer stabilizes operating voltage and prevents current concentration in vertical LEDs, ensuring reliable light emission.
- Light Emitting Element Reinforcing Portion for Pressure Damage
A light emitting element uses a light-transmissive reinforcing portion on the semiconductor layer upper face to increase edge strength.
- Patterned Electron Blocking Region in Light Emitting Device
Patterned electron blocking regions prevent electron overflow while hole injection regions facilitate carrier transport, resolving efficiency trade-offs.
- Vertical LED Current Blocking via Anisotropic Conductive Film
Anisotropic conductive adhesive film replaces high-pressure wafer bonding, resolving heat dissipation trade-offs while ensuring uniform current distribution.
- III-Nitride FET Gate Insulator Stack for High Breakdown Voltage
Segmented AlN and SiN dielectrics in trench gates resolve MOCVD PECVD processing incompatibility while maintaining low on-resistance.
- Semiconductor Light Emitting Element Segmented Reflection Layer
A semiconductor light emitting element uses a segmented reflection layer with varying thicknesses to optimize optical performance.
- Shallow Trench Gate Super Junction MOSFET Design
A super junction semiconductor device employs a shallow trench gate structure to reduce gate charge density.
- SiC Guard Ring with Localized Impurity at Corners
A silicon carbide guard ring uses higher p-type impurity concentration at corner portions to suppress charge trapping.
- Field-Plate Trench FET Gate Segmentation for Leakage Reduction
Segmenting the gate into a trench region and an independent field plate reduces gate-to-source leakage and device variability in silicon carbide substrates.
- Triangular GaN LED Chip Geometry for Light Extraction
Triangular GaN chip geometry reduces total internal reflection at sidewalls to increase light extraction efficiency.
- HVMOS P-type Dopant Region Breakdown Voltage Optimization
Localized P-type doping enhances breakdown voltage for N-type devices and reduces ON resistance for P-type variants without adding process masks.
- Junction Enhanced Trench Power MOSFET Drift Region Design
Lateral lightly doped drift regions merge with vertical trench structures to reduce gate-to-drain capacitance and on-resistance in power MOSFETs.
- Semiconductor Light Emitting Apparatus Reflective Electrode Design
A semiconductor light emitting apparatus uses a reflective n-side electrode layer overlapping the p-side electrode to redirect emitted light.
- Optoelectronic Chip Embedding with Exposed Contact Pads
Embed optoelectronic semiconductor chips into mold compounds using recessed carriers and film-assisted transfer molding to maintain electrical connectivity.
- Nitride Semiconductor Component With Structured Growth Substrate
A nitride semiconductor component uses a growth substrate with three-dimensional surface structures to direct epitaxial layer deposition.
- Metasurface Nanostructures Bend NIR Light for Thin CMOS Pixels
A metasurface with nanostructures bends near-infrared light at high angles to increase absorption in thin silicon pixels.
- SiC Semiconductor Device With Oblique Insulating Surfaces
Oblique insulating surfaces on silicon carbide regions suppress electric field concentration to improve breakdown voltage and mobility.
- Face-down LED CSP with Internal Wiring and Resin Support
Internal metallic wiring in resin layers replaces external bonding wires, reducing device volume while maintaining mechanical strength for reliable mounting.
- Nitride Semiconductor Recess Design for High Carrier Mobility
Deep recesses with specific depth ratios improve crystal quality and reduce sodium impurities in nitride semiconductors.
- Graphene Base Unipolar Heterojunction Transistor for THz Operation
A unipolar heterojunction transistor uses a graphene base layer to transport electrons with high mobility and low resistance.
- FinFET Spacer Reshaping for Reliable Source/Drain Connections
Pre-bake processes reshape FinFET spacers to facilitate horizontal epitaxial growth, preventing etch-through during contact plug formation.
- Luminescence Conversion LED With Segmented Phosphor Layers
Segmenting phosphor layers reduces mutual absorption losses, improving conversion efficiency and color rendering in luminescence conversion LEDs.