Optoelectronic Semiconductor Chip Trench Design for High Luminous Efficiency

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Solution Overview

Problem

Current optoelectronic semiconductor chips face challenges in achieving high luminous efficiency while maintaining low production costs, as increasing reflection coefficients at electrical contacts leads to higher production costs and complexity.

Innovation Solution

The optoelectronic semiconductor chip design includes a semiconductor layer sequence with an active layer between n- and p-conducting semiconductor regions, a transparent substrate, insulating trenches, a metallic current web, and a busbar, along with an electrically insulating mirror layer to enhance reflection and current distribution, all fabricated using a method that minimizes the number of photo layers required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the reflection coefficient at electrical contacts is increased to improve luminous efficiency, then light output efficiency is improved, but production costs and device complexity increase

Engineering Contradiction:
Improveluminous efficiencyVSAvoidproduction complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple functions into the mirror layer: it provides both electrical insulation and light reflection. By depositing the mirror layer directly in the trenches without separate insulation steps, the patent reduces production complexity while achieving high reflection coefficients at electrical contacts

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The mirror layer serves multiple purposes simultaneously: it acts as an electrical insulator, a light reflector, and a structural element defining the trench boundaries. This multi-functionality resolves the contradiction by improving luminous efficiency through high reflection without adding separate components that would increase production complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple photo layers are used to increase reflection coefficients, then luminous efficiency is improved, but production costs increase

Engineering Contradiction:
Improveluminous efficiencyVSAvoidproduction cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent achieves high reflection coefficients by optimizing the parameters of a single mirror layer (material composition, thickness, deposition conditions) rather than using multiple layers. This approach maintains luminous efficiency while reducing production costs by simplifying the manufacturing process

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a single, cost-effective mirror layer deposition process instead of multiple expensive photo layers. The mirror layer is applied directly in the trenches during the manufacturing process, eliminating the need for additional photo layers and associated costs

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves high light output efficiency with reduced production costs by maximizing reflection at electrical contacts and optimizing the structure of trenches and layers, ensuring efficient current distribution and radiation generation.

Implementation Method 1

at least in the insulating trench, an electrically insulating mirror layer that reflects radiation generated in the active layer

Methodology Applied
Scientific EffectReflection: Reflection

Data Source

PatentUS10777708B2Optoelectronic semiconductor chip and method of producing an optoelectronic semiconductor chip
Publication Date: 2020.09.15 OSRAM OLED
  • US10777708B2 patent drawing
  • US10777708B2 patent drawing
  • US10777708B2 patent drawing

AI summary

An optoelectronic semiconductor chip includes a semiconductor layer sequence, a transparent substrate, at least one contact trench, at least one insulating trench, at least one current distribution trench, at least in the insulating trench, an electrically insulating mirror layer that reflects radiation generated in an active layer, at least one metallic current web in the contact trench configured for a current conduction along the contact trench and supplying current to a first semiconductor region, and at least one metallic busbar in the current distribution trench that energizes a second semiconductor region, wherein the contact trench, the isolating trench and the current distribution trench extend from a side of the second semiconductor region facing away from the substrate through the active layer into the first semiconductor region, and the contact trench is completely surrounded by the insulating trench, and the current distribution trench lies only outside the insulating trench.