Pre-Co-Packaging Optoelectronic IC Testing Via Interposer
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Solution Overview
Problem
There is a lack of testing equipment for co-packaged optoelectronic integrated circuits that can meet customized designs, leading to high manufacturing costs and low yields due to the need to disassemble or take back defective products found in the final test stage.
Innovation Solution
A test device for optoelectronic integrated circuits with a stacked structure that includes a first jig, optical transmission assemblies, an interposer, and a test load board, allowing for electrical characteristic testing before co-packaging, ensuring non-defective components are integrated into a single package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If testing is performed after co-packaging, then the product structure is complete and functional, but defective products must be disassembled or taken back leading to high manufacturing costs and low yields
Solution Approach 1:
The patent implements preliminary testing of photonic integrated circuits and electronic integrated circuits individually before co-packaging. The testing apparatus establishes electrical connections with each component separately using conductor elements that contact bonding pads on the component surfaces, allowing defects to be detected and rejected before final assembly, thereby preventing waste of disassembly operations on defective products
2Measurement precision
If testing equipment is customized for each photonic integrated circuit design, then testing accuracy is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent designs a universal testing apparatus that can accommodate multiple types of photonic integrated circuits through a standardized interface system. The apparatus uses a common structure with conductor elements that can be positioned to contact bonding pads on different component types, and optical transmission assemblies that can test various photonic die configurations, eliminating the need for separate customized equipment for each circuit design
Solution Approach 2:
The patent introduces an interposer as an intermediary component between the testing apparatus and the integrated circuits. The interposer provides a standardized connection interface with multiple conductor elements that can interface with different photonic and electronic integrated circuit designs, allowing the testing equipment to remain universal while maintaining precise electrical connections for accurate measurement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables effective testing of optoelectronic integrated circuits, reducing manufacturing costs and improving yields by preventing disassembly of defective products post-co-packaging.
Implementation Method 1
A first optical transmission assembly (31) includes a first end portion (311) positioned in the accommodation space (110) and close to the first photonic die (61)... configured to send a test light signal to the first photonic die (61) or receive a light output signal generated by the first photonic die (61)
Implementation Method 2
The first conductor elements (13) are arranged at intervals and pass through corresponding via holes (401) included in the interposer (40) and the first bottom plate (111), and are electrically connected between the first photonic die (61) and the first electronic integrated circuit (63)
Data Source
AI summary
A test device for an optoelectronic integrated circuit before being co-packaged includes a first jig, a first optical transmission assembly, a second optical transmission assembly, an interposer, a test load board, and a second jig. The first jig and the second jig are arranged up and down in a direction perpendicular to the test load board. A first photonic die and a second electronic integrated circuit are arranged in an accommodation space of the first jig. A first electronic integrated circuit is disposed in a groove portion of the second jig. A first signal transmission loop is formed between the test load board, the first electronic integrated circuit, the first photonic die, and the second photonic die. A second signal transmission loop is formed between the test load board, the first electronic integrated circuit, the interposer, and the second electronic integrated circuit.