Optoelectronic Semiconductor Component With Carrier Thickness Variation

The patent transitions from a two-dimensional mounting arrangement (both components on the same surface) to a three-dimensional arrangement by utilizing the thickness dimension of the carrier. The carrier is designed with a first region having greater thickness than a second region, allowing the optoelectronic semiconductor chip to be mounted on the upper side in the thicker first region while the electronic component is mounted on the underside in the thinner second region. This vertical separation reduces the lateral footprint while maintaining electrical connectivity through the carrier's conductive structure.

Instead of uniformly increasing the carrier thickness throughout, the patent applies local quality by creating regions with different thicknesses. The first region has greater thickness to accommodate the optoelectronic semiconductor chip on the upper side, while the second region has reduced thickness for mounting the electronic component on the underside. This localized variation in thickness provides the necessary mounting space for both components without proportionally increasing the overall vertical extent of the entire component assembly.

The patent segments the carrier into distinct regions with different functional characteristics. The first region is designed with greater thickness for mounting the optoelectronic semiconductor chip, while the second region has reduced thickness for the electronic component. This segmentation allows the carrier to provide adequate mounting space for both components while maintaining a compact overall vertical profile, as each region is optimized for its specific mounting requirements rather than requiring uniform thickness throughout.