Organic Interposer Layered Structure for High-Density IC Packages
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Solution Overview
Problem
Current integrated circuit packages face challenges with silicon interposers due to high costs, size limitations, and inferior signaling performance, while organic interposers have limitations in size and layer count due to thermal expansion mismatches with silicon-based IC dice.
Innovation Solution
An electronic interposer with a layered structure comprising an upper section, middle section, and lower section, where each section has organic material layers with conductive routes and vias, allowing for high-density interconnects and improved thermal expansion matching, enabling larger and more efficient package architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If silicon interposers are used to provide high density interconnects, then manufacturing precision and interconnect density are improved, but cost increases and signaling performance deteriorates
Solution Approach 1:
The patent changes the material parameter from silicon to organic dielectric, fundamentally altering the interconnect structure. This allows replacement of complex TSV/BEOL processing with simpler via stacks in organic material, achieving high density interconnects at lower cost while improving signaling performance through eliminated TSV-related impairments
Solution Approach 2:
The patent employs cost-effective organic dielectric materials instead of expensive silicon substrates. The organic interposer provides the necessary mechanical support and electrical interconnection functions at a fraction of the cost of silicon, making high-density interconnects accessible without TSV complexity
2Manufacturing precision
If silicon interposers are used to achieve high density interconnects, then interconnect density is improved, but signaling performance worsens due to TSV inferiority
Solution Approach 1:
The patent extracts and eliminates the TSV component from the interconnect structure by using organic dielectric materials that allow simple via stacks. This removal of TSVs eliminates the source of signaling performance degradation while preserving the high density interconnect capability through precise via placement and routing in the organic substrate
3Ease of manufacture
If organic interposers are used to reduce cost, then manufacturing cost is improved, but size and layer count are limited due to CTE mismatch
Solution Approach 1:
The patent modifies the CTE parameter of the organic dielectric material to better match silicon IC dice, reducing thermal expansion mismatch from over 40 ppm/°C to a lower value. This parameter change enables larger interposer sizes and higher layer counts while maintaining mechanical reliability and reducing stress during thermal cycling
Solution Approach 2:
The patent uses composite organic dielectric materials that combine low CTE properties with good electrical and mechanical characteristics. These composite materials provide both the cost advantage of organic substrates and the thermal stability needed for large-scale, high-layer-count interposers
4Ease of manufacture
If EMIB interposers are used to improve cost efficiency, then manufacturing cost is improved, but processing time increases sequentially with number of silicon bridges
Solution Approach 1:
The patent segments the interconnect function into simple via stacks distributed throughout the organic interposer rather than requiring sequential embedding of multiple silicon bridges. This segmentation allows parallel processing of all interconnect formations in a single organic substrate, eliminating the sequential time penalty of EMIB while maintaining cost efficiency
Data Source
AI summary
An electronic interposer may be formed using organic material layers, while allowing for the fabrication of high density interconnects within the electronic interposer without the use of embedded silicon bridges. This is achieved by forming the electronic interposer in three sections, i.e. an upper section, a lower section and a middle section. The middle section may be formed between the upper section and the lower section, wherein a thickness of each layer of the middle section is thinner than a thickness of any of the layers of the upper section and the lower section, and wherein conductive routes within the middle section have a higher density than conductive routes within the upper section and the lower section.


