Organic Planarization Layer Etching for Low-k Dielectric Patterning
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Solution Overview
Problem
Existing semiconductor wafer processing techniques often damage porous low-k dielectric layers during patterning and etching, leading to increased k-values and feature size, making it difficult to achieve precise feature dimensions.
Innovation Solution
A method involving the formation of an organic planarization layer over a porous low-k dielectric layer, followed by etching using CO2-containing plasma to create trenches without damaging the low-k dielectric layer, and subsequent stripping of the organic layer to form dual damascene features, utilizing a plasma processing chamber with controlled gas sources and electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photoresist and etching processes are used, then features can be patterned, but the porous low-k dielectric layer is damaged leading to increased k-values and feature size
Solution Approach 1:
The patent segments the etching process into two distinct stages: first etching the organic planarization layer with CO2 plasma, then etching the low-k dielectric layer with fluorocarbon plasma. This segmentation allows each layer to be etched with optimized parameters that prevent damage to the underlying layer, resolving the contradiction between achieving precise feature dimensions and maintaining dielectric layer integrity.
Solution Approach 2:
The patent changes the etching gas parameter from conventional fluorocarbon-based gases to CO2 plasma for etching the organic planarization layer. This parameter change enables precise etching of the organic layer without the damage typically caused to low-k dielectric layers by conventional etchants, thereby maintaining both feature precision and layer integrity.
2Manufacturing precision
If the critical dimension of features is reduced, then device density increases, but the low-k dielectric layer becomes more susceptible to damage
Solution Approach 1:
The patent introduces an organic planarization layer as an intermediary between the photoresist mask and the low-k dielectric layer. This intermediary layer absorbs the harmful effects of the etching process, allowing precise feature definition while protecting the underlying low-k dielectric layer from damage that would occur with direct etching.
Solution Approach 2:
The patent employs CO2 plasma with specific power and pressure parameters to etch the organic planarization layer at critical dimensions without transmitting damage to the low-k dielectric layer. The controlled parameter changes enable sub-0.25 micron feature definition while maintaining dielectric layer integrity.
3Manufacturing precision
If conventional single-layer etching is used, then the process is simpler, but it cannot achieve precise features without damaging the dielectric layer
Solution Approach 1:
The patent divides the etching process into two sequential steps: etching the organic planarization layer followed by etching the low-k dielectric layer. Each step uses optimized gas chemistry and parameters tailored to the specific layer being etched, achieving precise feature definition while avoiding the need for complex in-situ process adjustments that would increase overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise etching of features into the low-k dielectric layer without damaging it, reducing the critical dimension of the features and maintaining the low-k value, thereby improving the accuracy and reliability of semiconductor device formation.
Implementation Method 1
providing a CO2 containing etch gas and forming a plasma from the CO2 containing etch gas, which etches the organic planarization layer
Implementation Method 2
providing fluorine containing gas from the fluorine containing gas source into an interior of the plasma processing chamber, transforming the fluorine containing gas into a plasma
Data Source
AI summary
A method of forming dual damascene features in a porous low-k dielectric layer is provided. Vias are formed in the porous low-k dielectric layer. An organic planarization layer is formed over the porous low-k dielectric layer, wherein the organic layer fills the vias. A photoresist mask is formed over the organic planarization layer. Features are etched into the organic planarization layer comprising providing a CO2 containing etch gas and forming a plasma from the CO2 containing etch gas, which etches the organic planarization layer. Trenches are etched into the porous low-k dielectric layer using the organic planarization layer as a mask. The organic planarization layer is stripped.