Small Molecule Organic Semiconductor TFT for High-Resolution LCDs
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Solution Overview
Problem
The existing methods for manufacturing array substrates for LCD devices using flexible plastic substrates at low temperatures face challenges with small molecule organic semiconductor materials, such as Pentacene, which are susceptible to moisture and difficult to deposit and pattern, limiting the width and distance of the semiconductor layer, and thus the resolution of the array substrate.
Innovation Solution
The solution involves forming a thin film transistor on a substrate with a gate electrode, source and drain electrodes, and a semiconductor layer made of small molecule organic semiconductor material, covered by a first passivation layer, allowing for precise control of the channel region dimensions and protection from moisture, enabling the use of small molecule organic semiconductor materials in high-resolution array substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If high temperature processes are used to manufacture array substrates, then the manufacturing process can be completed, but the semiconductor layer's conductivity deteriorates and the plastic substrate cannot be used
Solution Approach 1:
The patent changes the material parameters by using small molecule organic semiconductor materials that can be deposited at low temperatures (below 200°C) through vacuum evaporation, replacing traditional inorganic semiconductor materials that require high temperature processing. This parameter change enables the use of plastic substrates while maintaining semiconductor layer conductivity.
2Temperature
If small molecule organic semiconductor materials are used, then low temperature processing is enabled, but the materials are susceptible to moisture and chemical treatments
Solution Approach 1:
The patent applies preliminary protective actions by forming a gate insulating layer before depositing the semiconductor layer, and then forming a passivation layer after semiconductor layer deposition. These preliminary and subsequent protective layers shield the moisture-sensitive small molecule organic semiconductor material from environmental damage throughout the manufacturing process.
Solution Approach 2:
The patent creates a composite structure where the small molecule organic semiconductor layer is sandwiched between protective gate insulating layers and passivation layers. This composite material approach combines the low-temperature processability of organic semiconductors with the environmental stability of inorganic protective layers.
3Productivity
If traditional manufacturing methods are used, then the array substrate can be produced, but high resolution with small channel regions cannot be achieved
Solution Approach 1:
The patent replaces mechanical contact-based patterning methods with vacuum evaporation deposition, which allows for precise control of thin film thickness and pattern formation without mechanical contact. This substitution enables the fabrication of small channel regions (a few micrometers) with high precision while maintaining manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the fabrication of array substrates with channel regions within a few micrometers, enhancing the resolution and aperture ratio of LCD devices while protecting the semiconductor material from moisture, enabling the use of flexible plastic substrates in high-resolution displays.
Implementation Method 1
forming a semiconductor layer by evaporating a small molecule organic semiconductor material in the channel region
Data Source
AI summary
A liquid crystal display structure is provided. The liquid crystal display structure includes a pixel region and a thin film transistor on the substrate. The thin film transistor is adjacent to the pixel region and includes a gate electrode; a gate insulating layer having a top surface; a source electrode and a drain electrode at the top surface of the gate insulating layer; a semiconductor layer disposed at the top surface of the gate insulating layer, the semiconductor layer between the source electrode and the drain electrode defining a channel region, the semiconductor layer including a small molecule organic semiconductor material; and a first passivation layer covering the channel region, a top surface of the first passivation layer coinciding with or being below a top surface of each of the source electrode and the drain electrode.