Organic Thin Film Transistor Array Panel Inkjet Printing Overflow Control
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Solution Overview
Problem
The manufacturing of organic thin film transistor (OTFT) panels faces challenges in achieving uniform thickness and high aperture ratio due to overflow of organic solutions during inkjet printing, leading to non-uniform thin film transistor characteristics.
Innovation Solution
A method involving the formation of a gate line and pixel electrode on a substrate, followed by a gate insulating layer, data line with source and drain electrodes, an interlayer insulating layer with specific openings for organic semiconductor deposition, and a passivation layer to control the organic semiconductor placement and prevent overflow, using transparent conductive materials like ITO or IZO, and etching techniques to minimize mask usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If partitions are formed to confine the organic solution during inkjet printing, then the organic solution overflow is prevented and uniform thickness is achieved, but the aperture ratio of the pixel is decreased
Solution Approach 1:
The patent removes the partition structure from the pixel region and relocates the organic solution confinement function to the interlayer insulating layer. The interlayer insulating layer is formed to extend over the data line and pixel electrode, creating a confined region that holds the organic solution without requiring side partitions, thereby maintaining high aperture ratio while achieving uniform film thickness.
Solution Approach 2:
The patent transitions from a two-dimensional partition structure (sides of the opening) to a three-dimensional confinement structure using the interlayer insulating layer that extends vertically and horizontally. The interlayer insulating layer is formed at a different layer level, creating a dam structure that confines the organic solution from above and the sides, effectively using the vertical dimension to solve the horizontal confinement problem.
2Area of stationary object
If partitions are minimized to increase aperture ratio, then the pixel area is maximized, but the organic solution overflows and causes non-uniform thin film characteristics
Solution Approach 1:
The patent extracts the confinement function from the partition structure and assigns it to the interlayer insulating layer. By removing the partition from the pixel opening and using the interlayer insulating layer as the confinement structure, the pixel area is maximized while the organic solution is still effectively contained within the opening during inkjet printing.
3Manufacturing precision
If multiple masks are used for etching data line and pixel electrode, then precise patterning is achieved, but the manufacturing process complexity increases
Solution Approach 1:
The patent combines the patterning of the data line and pixel electrode into a single photolithography and etching process. A photoresist pattern is formed that simultaneously defines both structures, and a single etching step patterns both the data line and pixel electrode, eliminating the need for separate masking and etching steps for each structure.
Solution Approach 2:
The photoresist pattern serves multiple functions: it defines the data line pattern, defines the pixel electrode pattern, and acts as an etch mask for both structures. This multi-functional approach reduces the total number of process steps and masks required, simplifying the manufacturing process while maintaining precise patterning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures a uniform thickness and high aperture ratio for the thin film transistor array panel, improving the characteristics of OTFTs by preventing organic solution overflow and simplifying the manufacturing process.
Implementation Method 1
The organic semiconductor may be formed by an ink-jet method
Implementation Method 2
The second opening may be formed by etching the interlayer insulating layer using the passivation layer as an etch mask
Data Source
AI summary
A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.