Orthogonal Die Stack Architecture for Power Delivery and Heat Removal
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Solution Overview
Problem
Conventional IC die stacking architectures face limitations in power delivery and heat removal as stacks grow taller, restricting the number of high-power compute IC dies that can be included due to parallel die orientation and routing through multiple layers.
Innovation Solution
The die stack is positioned orthogonal to the base, with each die having a redistribution layer, allowing direct power and input/output connections to each die, and efficient heat removal through direct base-to-die connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional parallel die stacking is used, then mechanical stability is achieved, but power delivery and heat removal become limited as stacks grow taller
Solution Approach 1:
The patent transitions from conventional parallel die stacking (all dies oriented horizontally) to an orthogonal configuration where compute dies are stacked vertically perpendicular to the package substrate. This dimensional change enables direct through-substrate vias to reach each die individually, solving the power delivery limitation while maintaining mechanical stability through the orthogonal structural arrangement
2Strength
If conventional parallel die stacking is used, then mechanical stability is achieved, but heat removal becomes inefficient as stacks grow taller
Solution Approach 1:
By stacking compute dies orthogonally perpendicular to the package substrate rather than in parallel layers, the invention enables direct thermal pathways from each die to the substrate through-thickness. This dimensional reconfiguration allows heat to be removed efficiently from each die individually without the thermal accumulation problems of tall parallel stacks
3Ease of operation
If orthogonal die stacking is implemented, then direct power and I/O connections to each die are enabled, but manufacturing complexity increases
Solution Approach 1:
The invention segments the die stack into a base die (package substrate) and multiple orthogonal compute dies, with each die independently connected through its own through-substrate via. This segmentation enables direct connections to each die while allowing the manufacturing process to be broken into manageable stages: forming vias in the base die, attaching compute dies orthogonally, and establishing individual connections without complex multi-layer routing
Data Source
AI summary
Microelectronic assembly architectures including a die stack in which each die includes a redistribution layer, and the die stack is positioned such that the face of each die is perpendicular to a face of a base, are provided. Each die has a first face and a second face opposite the first face, and an edge extending between the first and second faces. A redistribution layer is deposited on the first face of each die. The faces of each die in the die stack are parallel to the faces of the other dies. The die stack is positioned on the base such that the faces of each die are orthogonal to the face of the base. Each die can have a conductive contact on a bottom edge, and the conductive contact can be coupled to the respective redistribution layer on the die and to a conductive contact on the base.