Orthogonal Readout Architecture for Ultra-High Speed Imaging Arrays
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Solution Overview
Problem
Conventional imaging systems face limitations in ultra-high speed photography due to the time required for image readout, which restricts the rate at which successive images can be collected, especially without on-chip data storage, and even with storage, the image duty cycle is limited by the total readout time.
Innovation Solution
The imaging sensor collapses a two-dimensional image into two one-dimensional data lines, one for the rows and one for the columns, allowing simultaneous summation and storage of signal information from all pixels, reducing the number of required output cycles from n*m to n+m, enabling faster image collection and reconstruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional readout methods are used where all pixels must be output sequentially, then complete image data can be obtained, but the readout time increases and frame rate decreases
Solution Approach 1:
The patent extracts only the essential information needed for image reconstruction by summing pixel signals along row and column directions. Instead of outputting all n*m pixel values, only n+m summed values are extracted and transmitted, dramatically reducing readout time while preserving sufficient information for complete image reconstruction through computational methods.
Solution Approach 2:
The patent transforms the two-dimensional array of n*m pixels into two one-dimensional vectors of n and m elements through orthogonal summation along row and column directions. This dimensional transformation reduces the data output requirement from n*m values to n+m values, enabling faster readout while maintaining reconstruction capability.
2Productivity
If on-chip data storage is implemented to store multiple frames, then frame rate can be maintained, but image duty cycle is limited by total readout time
Solution Approach 1:
The patent extracts minimal sufficient data (n+m summed values instead of n*m pixel values) for each frame, reducing the readout burden and enabling continuous operation without sacrificing image duty cycle. This extraction approach allows the system to maintain high frame rates while keeping readout time as a small fraction of the imaging cycle.
Solution Approach 2:
The patent performs preliminary summation of pixel signals along row and column directions while the integration is occurring, so that when readout is needed, the data is already processed into the compact n+m format. This preliminary action eliminates the need for lengthy post-integration processing and maintains high image duty cycle.
3Loss of information
If full two-dimensional pixel array is read out, then complete spatial information is obtained, but readout complexity and time increase
Solution Approach 1:
The patent segments the two-dimensional pixel array into two independent one-dimensional summation paths: rows and columns. By dividing the readout task into these two orthogonal segments, the system reduces the complexity of simultaneously reading all pixels while preserving the spatial information needed for reconstruction through the complementary nature of row and column sums.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the time needed for image readout, allowing for higher frame rates and maintaining image duty cycle efficiency by reducing the number of output cycles, making it suitable for ultra-high speed applications with sufficient information for complete image reconstruction even with few photons.
Implementation Method 1
conventional imagers and imaging systems such as that shown in FIG. 1 converts incident photons into electrons that are collected during an image integration interval
Data Source
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AI summary
A plurality of unit pixels in a two dimensional imaging array are arranged in a manner that signal charges along a given row are added to other relevant signal charges of the same row. Signal charges along a given column are added to other relevant signal charges of the same column. Summed charge values are output simultaneously from rows and columns to produce one row and one column of image data. The resulting summed data is temporarily stored in on-chip buffers and then output from the chip during the integration time of the next imaging cycle with no loss in imaging duty cycle.