Heuristic Invalidation of Non-Useful OSC History Table Entries
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Solution Overview
Problem
Conventional mechanisms for managing store-compare hazards in microprocessors that execute load and store instructions out-of-order often lead to performance degradation due to unnecessary maintenance of load store dependencies, as existing methods for invalidating operand-store-compare (OSC) predictions are inefficient and random, causing useful entries to be removed and recreated in the OSC history table.
Innovation Solution
A heuristic method is introduced to invalidate non-useful entries in the OSC history table by tracking data forwarding information and using a useless OSC prediction counter to determine when an entry is no longer useful, allowing for more accurate identification and removal of unnecessary predictions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional mechanisms use an OSC history table to remember previously unknown dependencies between store and load instructions, then store-compare hazards can be managed, but changing conditions may render OSC predictions useless, causing unnecessary load store dependencies to be maintained and leading to performance degradation
Solution Approach 1:
The patent applies preliminary action by proactively invalidating OSC history table entries when data forwarding conditions indicate they are no longer useful, rather than waiting for them to cause hazards. The system monitors data forwarding between load and store instructions and preemptively removes predictions that will become obsolete, preventing future performance degradation while maintaining reliable hazard management.
Solution Approach 2:
The patent implements feedback by using the occurrence of data forwarding as a signal to update the OSC history table. When data forwarding occurs between load and store instructions, this feedback indicates that the associated OSC prediction is no longer valid, triggering invalidation of the corresponding table entry. This closed-loop mechanism ensures the history table remains accurate and useful.
2Productivity
If the processor permits loads to be executed ahead of stores out of order, then performance advantage is achieved, but store violation conditions may occur late in the instruction execution pipeline, causing severe recovery penalties
Solution Approach 1:
The patent applies preliminary action by performing out-of-order execution of loads ahead of stores when data forwarding conditions are met, while simultaneously tracking these conditions to enable early detection of potential store violation conditions. This allows the processor to maintain high performance through out-of-order execution while preparing to quickly recover if violations occur, reducing the effective recovery penalty.
3Device complexity
If useless OSC predictions are maintained in the OSC history table, then the table structure remains simple, but performance degradation occurs due to unnecessary maintenance of load store dependencies
Solution Approach 1:
The patent applies the taking out principle by selectively removing useless OSC predictions from the history table based on data forwarding information. Rather than maintaining all predictions or using complex invalidation schemes, the system extracts and removes only those predictions that are no longer valid, simplifying the table structure while preventing performance degradation from useless entries.
Data Source
AI summary
Methods, systems and computer program products for heuristically invalidating non-useful entries in an array are provided. Aspects include receiving an instruction that is associated with an operand store compare (OSC) prediction for at least one of a store function and a load function. The OSC prediction is stored in an entry of an OSC history table (OHT). Aspects also include executing the instruction. Responsive to determining, based on the execution of the instruction, that data forwarding did not occur, aspects include incrementing a useless OSC prediction counter. Responsive to determining that the useless OSC prediction counter is equal to a predetermined value, aspects also include invalidating the entry of the OHT associated with the instruction.