Capacitor-Powered Oscillator ADC for Low-Power Data Conversion

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Solution Overview

Problem

Conventional analogue-to-digital converters (ADCs) face challenges in scaling efficiently with smaller semiconductor process node geometries and high power consumption, particularly in battery-powered devices requiring continuous data conversion.

Innovation Solution

The proposed solution involves an analogue-to-digital converter circuit that uses a sampling capacitor to charge during the sampling phase and discharge into a controlled oscillator during the read-out phase, where the frequency of oscillation depends on the capacitor's voltage, allowing for efficient power usage and reduced circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional ADCs use multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then measurement precision is maintained, but area of stationary object increases and use of energy by stationary object increases

Engineering Contradiction:
Improveconversion accuracyVSAvoidsemiconductor area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent changes the operating parameters by using a single capacitor that dynamically switches between sampling and conversion modes, rather than using multiple fixed analogue components. This parameter change allows the same component to serve multiple functions, reducing the total semiconductor area while maintaining conversion accuracy through precise timing and voltage control

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The single capacitor in the patent performs multiple functions: it acts as a sampling capacitor during the sampling phase and as a conversion capacitor during the read-out phase. This multi-functionality eliminates the need for separate analogue components (multiple capacitors, resistors, current sources), thereby reducing semiconductor area while preserving measurement precision through controlled operation in different phases

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If conventional ADCs use multiple analogue components such as banks of well-matched or ratioed resistors, capacitors or current sources, then measurement precision is maintained, but use of energy by stationary object increases

Engineering Contradiction:
Improveconversion accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent changes the energy consumption parameter by eliminating continuous power supply to multiple analogue components. Instead, a single capacitor is charged during sampling and then discharged during conversion, creating a pulsed energy consumption pattern rather than continuous consumption. This reduces overall power usage while maintaining conversion accuracy through precise timing control

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and eliminates unnecessary analogue components (multiple capacitors, resistors, current sources) that consume power continuously. By using only a single capacitor switched between phases, the design removes redundant power-consuming elements while preserving the essential conversion function, thereby reducing power consumption without sacrificing measurement precision

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If ADC circuitry is scaled to smaller semiconductor process node geometries, then area of stationary object decreases, but manufacturing precision becomes more difficult and reliability decreases

Engineering Contradiction:
Improvesemiconductor areaVSAvoidcircuit fabrication accuracy
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent changes the design parameters by using a single capacitor with larger effective area (achieved through longer duration charging) rather than multiple smaller capacitors. This parameter change makes the circuit more tolerant to manufacturing variations at small process nodes, as fewer components are involved and the single capacitor can be optimized for better matching and lower sensitivity to fabrication tolerances

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The single multi-functional capacitor reduces the total component count, which simplifies the manufacturing process at small geometries. With fewer components to fabricate and match, the circuit becomes less sensitive to manufacturing precision requirements, allowing successful implementation at smaller process nodes while maintaining performance

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables ADCs to operate efficiently in smaller geometries with lower power consumption, maintaining accuracy and linearity through differential conversion and compensation for non-linearity, suitable for applications like neuromorphic computing and portable devices.

Implementation Method 1

a first capacitor, a first controlled oscillator; and a first counter configured to generate a count value based on a number of oscillations in an output of the first controlled oscillator in a count period during a read-out phase

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12149256B2Data conversion
Publication Date: 2024.11.19 CIRRUS LOGIC INC
  • US12149256B2 patent drawing
  • US12149256B2 patent drawing
  • US12149256B2 patent drawing

AI summary

This application describes method and apparatus for data conversion. An analogue-to-digital converter circuit receives an analogue input signal (SIN) and outputs a digital output signal (SOUT) The circuit has a sampling capacitor, a controlled oscillator and a counter for generating a count value based on a number of oscillations in an output of the controlled oscillator in a count period during a read-out phase. The digital output signal is based on the count value. The converter circuit is operable in a sampling phase and the read-out phase. In the sampling phase, the sampling capacitor is coupled to an input node for the input signal, e.g. via switch. In the read-out phase, the sampling capacitor is coupled to the controlled oscillator, e.g. via switch, such that capacitor powers the first controlled oscillator and a frequency of oscillation in the output of the first controlled oscillator depends on the voltage of the first capacitor.