Oscillator Wafer-Level Package Thermal Stress Reduction
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Solution Overview
Problem
Existing oscillator wafer-level-package structures face challenges with cavity placement, thermal stress due to mismatched thermal expansion coefficients, and increased fabrication costs, which hinder miniaturization and integration of semiconductor IC chips.
Innovation Solution
The proposed structure relocates cavities to the upper and lower surfaces of the oscillator crystal, incorporates a diffusion barrier between metal layers, and designs the capping and bottom layers with similar thermal expansion coefficients to minimize stress, using materials like ruthenium, titanium, or their alloys to prevent interface diffusion, and employs Through Quartz Via technology for high-density electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the cavity is formed on the bottom base layer to accommodate the quartz crystal, then the packaging structure can be formed, but the area for electrical connections is reduced and test process becomes difficult
Solution Approach 1:
The cavity is relocated from the bottom base layer to the top surface of the quartz crystal. This inversion of the cavity position allows the bottom base layer to provide full electrical connection area while the top surface cavity accommodates the quartz crystal, resolving the contradiction between packaging stability and electrical connection accessibility.
2Adaptability or versatility
If different materials are used for upper cap and lower base, then the quartz crystal can be accommodated, but thermal stress occurs due to different thermal expansion coefficients
Solution Approach 1:
The bottom base layer and top surface are designed with matched thermal expansion coefficients to the quartz crystal material. This homogeneity in thermal properties eliminates differential thermal stress during temperature variations, while still allowing material selection flexibility for other performance requirements.
3Manufacturing precision
If the cavity spacing is constrained by process capability, then the packaging can be formed, but the area for electrical connections is cut off
Solution Approach 1:
By inverting the cavity position from the bottom base layer to the top quartz crystal surface, the electrical connection area on the bottom base layer is fully preserved. The cavity formation precision requirements are maintained on the quartz crystal top surface where they do not interfere with electrical connection routing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances packaging efficiency, reduces thermal stress, and lowers fabrication costs by allowing for more reliable and high-density electrical connections, improving the integration and miniaturization of semiconductor IC chips.
Implementation Method 1
a diffusion barrier is provided between the interface metal layer and the connecting metal layer of the seal rings
Implementation Method 2
an upper cap and a lower base made of blue plate glass are anodic bonded with the quartz crystal so as to form a sandwich structure
Implementation Method 3
a quartz crystal piezoelectric element as an oscillator
Data Source
AI summary
An oscillator wafer-level-package structure is provided, comprising a bottom layer, an oscillator crystal and a capping layer. The bottom layer includes an upper plane, the capping layer includes a lower plane, and the oscillator crystal is disposed between the bottom layer and the capping layer and includes at least one cavity. An upper seal ring and a lower seal ring are respectively surrounding the oscillator crystal such that the oscillator crystal is sealed in between the capping layer and the bottom layer by employing the upper and lower seal rings. In addition, a diffusion barrier is further disposed in the upper seal ring and in the lower seal ring for avoiding interface diffusion. Moreover, the present invention adopts the same material for fabricating the capping layer, the oscillator crystal and the bottom layer to achieve an optimal thermal stress result when realizing the packaging structure.


