One-Time Programmable Memory Cell With Fuse-Based Error Correction

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Solution Overview

Problem

Conventional One Time Programmable (OTP) memory cells, such as anti-fuse and fuse OTP memory cells, are limited to single programming and require complex circuit designs and large layout areas for error correction, restricting their flexibility and reliability.

Innovation Solution

An OTP memory cell design incorporating an anti-fuse programmable transistor and two control transistors allows for direct error bit correction through reprogramming, simplifying circuit and layout, and enabling a smaller layout area with higher reliability and safety.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dual-bit backup or redundant correction bit is used to correct programming results, then programming reliability is improved, but circuit complexity and layout area increase

Engineering Contradiction:

Improveprogramming reliabilityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The fuse element serves multiple functions: it enables initial programming by establishing a conductive state, and subsequently enables correction programming by being broken to revert to a non-conductive state. This multi-functionality allows a single fuse to handle both programming and correction operations, eliminating the need for separate redundant bits or dual-bit backup circuits.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The correction mechanism works by discarding the previously programmed state (breaking the fuse to restore high resistance) and recovering the original state. This allows the memory cell to correct programming errors by reversing the programming action, rather than requiring additional redundant storage elements.

Inventive Principle:

Principle #34Discarding and recovering

2Reliability

If dual-bit backup or redundant correction bit is used to correct programming results, then programming reliability is improved, but layout area increases

Engineering Contradiction:

Improveprogramming reliabilityVSAvoidlayout area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention merges the programming and correction functions into a single memory cell structure. The same fuse and transistor components are used for both initial programming and correction operations, consolidating what would traditionally require separate redundant cell structures into one unified design.

Inventive Principle:

Principle #5Merging (Combining)

3Device complexity

If conventional fuse OTP memory cell is used, then simple structure is achieved, but reprogramming capability is lost

Engineering Contradiction:

Improvestructure simplicityVSAvoidreprogramming capability

Core Design Contradiction:

Device complexityVSAdaptability or versatility

Solution Approach 1:

The memory cell transitions from a static, single-programmable state to a dynamic state where the fuse can be selectively broken or left intact based on correction needs. The system adapts its behavior: during normal programming the fuse remains intact, and during correction programming the fuse is broken to revert the cell state, enabling flexible reprogramming capability.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The fuse is initially configured in a state that allows programming (intact, low resistance). The correction capability is prepared in advance by maintaining the fuse structure that can be selectively broken. This preliminary configuration enables the cell to perform correction operations when needed, without requiring additional structural modifications.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design adds reprogramming capability, allowing for correction of programming results, enhancing flexibility and applicability, and reducing layout area while maintaining high reliability and safety.

Implementation Method 1

by breaking down an insulating layer between a polycrystalline layer and an N+ diffusion layer of a programmable transistor, causes the resistance between the two layers to change (decrease)

Methodology Applied

Scientific EffectInsulating layer breakdown: Avalanche Breakdown

Implementation Method 2

The fuse OTP memory cell (eFuse) is programmed based on the characteristics of electron migration by burning out the fuse to cause the resistance between the two ends of the fuse to change

Methodology Applied

Scientific EffectElectron migration: Electron Avalanche

Data Source

PatentUS12406734B2One time programmable memory cell

Publication Date: 2025.09.02 SHANGHAI HUALI MICROELECTRONICS CORP

AI summary

This application discloses a one-time programmable memory cell, which includes one anti-fuse programmable transistor, one fuse, and two control transistors. One of a source end and a drain end of a first control transistor is connected to one of a source end and a drain end of the anti-fuse programmable transistor, and the other is connected to one of a source end and a drain end of a second control transistor and one end of the fuse. The other of the source end and the drain end of the second control transistor is connected to the ground. The one time programmable memory cell disclosed in this application can directly correct an error bit through reprogramming, can simplify circuit and layout design, requires a smaller layout area, and has higher reliability and safety.