3D OTP Memory Cells with Series Selector-Resistor Stacking for High Density
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Solution Overview
Problem
Existing one-time programmable (OTP) memories face challenges with low density, difficulty in downsizing, and increased cost due to the use of polysilicon resistors and large transistors, especially in 3D structures, which degrade performance and increase costs.
Innovation Solution
The OTP memory employs 1S1R memory cells with a selector and a resistive element in series, using ovonic threshold switches and phase change materials, allowing for high-density, 3D stacking with no additional masks, and includes a write operation to switch cells to logic '1' states and a read operation to sense them reliably.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon resistors and large transistors are used in OTP memory, then the memory can be programmed once for permanent storage, but the density is low and the cost increases
Solution Approach 1:
The patent changes the resistance parameter of the memory element by using a resistive element that can switch between high resistance state (programmed state) and low resistance state (unprogrammed state). This allows compact cell design while maintaining reliable programming capability through resistance change detection
Solution Approach 2:
The patent replaces the mechanical/polysilicon resistor-based programming mechanism with an electrical field-effect mechanism using a selector transistor and resistive element. This substitution enables smaller cell size and higher density while maintaining the one-time programming function through electrical resistance changes rather than physical material modifications
2Ease of manufacture
If polysilicon resistors are used in OTP memory, then programming can be achieved, but downsizing becomes difficult and costs increase
Solution Approach 1:
The patent uses resistive elements whose resistance parameter can be changed from high to low state through programming, enabling compact cell design. The cell size is reduced by utilizing the resistance state change rather than requiring large polysilicon resistor structures, achieving both manufacturability and downsizing
Solution Approach 2:
The patent transitions from planar polysilicon resistor structures to vertically-stacked 3D memory cell architectures. This dimensional change allows the resistive element to be positioned above the selector transistor, reducing the lateral footprint and enabling cell sizes of 4F² or smaller while maintaining programming capability
3Productivity
If 3D structures are used in OTP memory, then density can be increased, but performance degrades and costs increase
Solution Approach 1:
The patent implements 3D stacked memory cells where the resistive element is positioned vertically above the selector transistor, achieving high density through z-direction stacking. Performance is maintained by carefully designing the selector transistor to provide sufficient drive current through the stacked structure and by optimizing the resistive element properties for reliable resistance state detection
Solution Approach 2:
The patent introduces a carefully designed selector transistor as an intermediary between the control circuitry and the resistive element in 3D structures. This intermediary provides sufficient drive current to program the resistive element while maintaining reliable read operations, bridging the performance gap that typically arises in vertically-stacked configurations
4Ease of manufacture
If large transistors are used in OTP memory, then programming can be performed, but the sensing window becomes small and reliability decreases
Solution Approach 1:
The patent achieves a large sensing window by utilizing the dramatic resistance change of the resistive element from high resistance state to low resistance state. This parameter change creates a large difference in current flow between programmed and unprogrammed states, enabling reliable detection with small transistor sizes and improving measurement precision
Solution Approach 2:
The patent uses composite material structures for the resistive element, such as phase-change materials or transition metal oxides, that exhibit large resistance changes between states. This composite approach enhances the sensing window by creating more distinct resistance differences, improving detectability without requiring larger transistors
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides high-density, reliable, and cost-effective OTP memory with a large sensing window and good reliability, enabling efficient storage of data and global chip information without extra fabrication steps.
Implementation Method 1
Each of the plurality of memory cells may include a selector and a resistive element arranged in series... using ovonic threshold switches and phase change materials
Implementation Method 2
An eFuse may provide a reduced resistance upon programming
Data Source
AI summary
A one-time programmable (OTP) memory includes a plurality of bit lines, a plurality of word lines, and a plurality of memory cells, each memory cell of the plurality of memory cells including a first terminal coupled to a bit line of the plurality of bit lines, a second terminal coupled to a word line of the plurality of word lines, and a selector coupled between the first terminal and the second terminal and having a threshold voltage that is alterable by an electric current.