OTP Memory Cell Dielectric Layout for Consistent Programming

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Solution Overview

Problem

Existing one-time-programmable (OTP) memory elements in integrated circuits face challenges in reliably and consistently altering the resistance of dielectric material layers during programming, leading to inconsistent data storage and read operations.

Innovation Solution

The OTP memory cell design includes transistors with differently configured gate dielectric layers, where the first transistor's dielectric layer is thinner and more susceptible to breakdown during programming, while the second transistor acts as a switching element, ensuring reliable programming and reading by controlling the electric field distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dielectric material layer is used in OTP memory elements to provide non-volatile memory, then data storage capability is achieved, but the resistance alteration during programming becomes unreliable and inconsistent

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidresistance alteration consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by using two different dielectric material layers with distinct properties: a first dielectric layer with higher breakdown voltage and a second dielectric layer with lower breakdown voltage. This differentiation allows the structure to have different resistance alteration characteristics in different regions, enabling reliable programming through controlled breakdown of the second layer while maintaining data storage through the first layer.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite materials by combining two different dielectric material layers in a stacked configuration. The first dielectric layer (e.g., silicon oxide) and second dielectric layer (e.g., silicon nitride) have different electrical properties, creating a composite structure that achieves both reliable programming through controlled breakdown and consistent resistance alteration, resolving the contradiction between reliability and manufacturing precision.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a programming electric field is applied across the dielectric material layer to sustainably alter resistance, then data storage is achieved, but the process leads to inconsistent read operations

Engineering Contradiction:
Improvedata storage consistencyVSAvoidread operation consistency
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent uses local quality by assigning different dielectric materials to different functional regions: the first dielectric layer serves as the data storage medium with higher breakdown voltage, while the second dielectric layer serves as the programming control layer with lower breakdown voltage. This spatial differentiation ensures that programming affects only the second layer, creating consistent resistance changes for reliable read operations while preserving data in the first layer.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The composite dielectric structure with two different materials enables separate optimization of programming and reading functions. The first dielectric layer maintains data storage with stable electrical properties, while the second dielectric layer provides controlled resistance alteration during programming. This composite approach ensures both consistent data storage and consistent read operations by preventing unwanted breakdown in the data storage layer.

Inventive Principle:
Principle #40Composite materials

3Reliability

If the dielectric material layer resistance is altered to program the memory, then non-volatile storage is achieved, but the programming process lacks reliability

Engineering Contradiction:
Improveprogramming consistencyVSAvoiddielectric layer configuration
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies segmentation by dividing the dielectric structure into two separate layers with distinct materials and functions. The first dielectric layer handles data storage while the second dielectric layer handles programming control. This segmentation allows each layer to be optimized independently for its specific function, improving programming reliability through controlled breakdown of the second layer while maintaining ease of manufacture using standard semiconductor fabrication processes for multi-layer dielectric structures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the reliability and consistency of programming and reading operations in OTP memory cells, maintaining data integrity even without power supply.

Implementation Method 1

the first transistor's dielectric layer is thinner and more susceptible to breakdown during programming

Methodology Applied
Scientific EffectDielectric breakdown: Avalanche Breakdown

Implementation Method 2

a programming electric field is applied across the dielectric material layer to sustainably alter (e.g., break down) the dielectric material, thus decreasing the resistance of the dielectric material layer

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS12446284B2Memory device and method for forming the same
Publication Date: 2025.10.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12446284B2 patent drawing
  • US12446284B2 patent drawing
  • US12446284B2 patent drawing

AI summary

A memory device includes a substrate, an active region, a first gate structure, a second gate structure, a first word line, and a second word line. The active region protrudes from a top surface of the substrate. The active region has at least one ring structure, in which when viewed from above, the ring structure has a first linear portion, a second linear portion, a first curved portion, and a second curved portion, the first curved portion connects first sides of the first and second linear portions, and the second curved portion connects second sides of the first and second linear portions. The first gate structure and the second gate structure are over the substrate and cross the active region. The first word line and the second word line are electrically connected to the first gate structure and the second gate structure, respectively.