OTP Memory Multi-Programming Fuse Array Segmentation
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Solution Overview
Problem
Existing one-time programmable (OTP) semiconductor memory devices face challenges in efficiently programming multiple fuse cells simultaneously without increasing the current-supplying capacity of the high voltage generator, which limits programming speed and increases chip size.
Innovation Solution
The OTP memory device includes a plurality of fuse cells that can be programmed at once by blocking current flow through each cell when it reaches a predetermined value, utilizing a fuse array, high voltage generator, program control circuit, and column selecting circuit to manage programming, allowing for simultaneous programming of multiple fuse cells without increasing the high voltage generator's capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple fuse cells are programmed simultaneously, then programming speed is improved, but the current-supplying capacity of the high voltage generator must be increased
Solution Approach 1:
The patent divides the fuse cell array into multiple groups that can be programmed independently. By segmenting the programming operation into parallel groups, multiple fuse cells are programmed simultaneously without requiring the high voltage generator to supply current to all cells at once, thus maintaining programming speed while avoiding the need to increase the generator's current-supplying capacity.
Solution Approach 2:
The patent implements periodic programming cycles where different groups of fuse cells are programmed in alternating time periods. This periodic action allows the high voltage generator to service one group at a time in a cyclic manner, enabling multiple cells to be programmed simultaneously across different time slots without increasing the peak current requirement of the generator.
2Loss of time
If multiple fuse cells are programmed simultaneously, then programming time is reduced, but chip size increases
Solution Approach 1:
The patent merges the programming control functions into an integrated control circuit that manages multiple fuse cell groups. By combining the control logic and using shared high voltage generator resources, the design achieves simultaneous programming capability without proportionally increasing chip area, as multiple functions share common circuit elements.
Solution Approach 2:
The patent introduces a time dimension to the programming process, allowing multiple fuse cells to be programmed in parallel across different time periods rather than requiring all cells to be programmed simultaneously in a single time slot. This temporal multiplexing reduces the need for increased current capacity and chip area while maintaining reduced programming time.
3Productivity
If the high voltage generator's current-supplying capacity is increased, then more fuse cells can be programmed at once, but the device complexity increases
Solution Approach 1:
The patent segments the fuse cell array into multiple independently controllable groups, each with its own word line and bit line connections. This segmentation allows the control circuit to manage programming operations on smaller subsets of cells simultaneously, achieving high productivity without requiring a proportionally more complex high voltage generator or control system.
Solution Approach 2:
The patent designs the high voltage generator and control circuit to serve multiple functions: they can program different groups of fuse cells, perform verification operations, and handle error correction coding. This multi-functionality allows the same hardware components to support multiple fuse cells being programmed at once without increasing device complexity, as the components are already designed to handle varied operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster programming times and reduces chip size by allowing multiple fuse cells to be programmed simultaneously, improving the efficiency and compactness of the semiconductor memory device.
Implementation Method 1
The high voltage generator generates a high voltage and provides the high voltage to the fuse array through the high voltage supplying lines
Implementation Method 2
in response to determining that a current flowing through each of the fuse cells increases to a predetermined value, the OTP memory is configured to block the current flowing through each of the fuse cells
Implementation Method 3
The OTP cell array may include an anti-fuse and an electric fuse. The anti-fuse is a device that turns on when a certain condition is satisfied
Implementation Method 4
The electric fuse is a device that turns off when a certain condition is satisfied
Data Source
AI summary
A one-time programmable (OTP) memory capable of performing a multi-programming and a semiconductor memory device including the OTP memory are disclosed. The OTP memory includes a plurality of fuse cells in which two or more fuse cells are programmed at a time. In a program mode, in response to determining that a current flowing through each of the fuse cells increases to a predetermined value, the OTP memory blocks the current flowing through each of the fuse cells.