OTP Memory Locking via Controller Voltage Control
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Solution Overview
Problem
Existing one-time programmable (OTP) memory elements, such as programmable fuses, are expensive and difficult to program, and existing solutions lack efficient methods to lock OTP memory areas without additional circuitry, which complicates the programming process and increases costs.
Innovation Solution
A method is implemented in a data processing device where a memory controller determines if a write access is associated with an OTP memory location, performing a read operation with a lower voltage than non-OTP locations to ensure only un-programmed cells can be written, thereby locking the OTP area and preventing subsequent writes, enhancing detection of programmed cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If programmable fuses are used as OTP memory elements, then the memory can store information that is unlikely to change, but the fuses are expensive and the programming process is difficult
Solution Approach 1:
The patent replaces expensive programmable fuses with standard flash memory cells that can be programmed using conventional flash memory technology. The flash memory cells serve as disposable OTP elements that can be programmed once and then locked, eliminating the need for specialized fuse components while maintaining the one-time programmable functionality.
Solution Approach 2:
The patent replaces the physical blowing of fuses (mechanical/thermal process) with electrical programming operations on flash memory cells. The memory controller uses voltage-based programming mechanisms inherent to flash memory technology, substituting the complex fuse blowing process with simpler electrical operations that can be performed during normal memory programming sequences.
2Reliability
If additional circuitry is added to lock OTP memory areas, then the locking function is achieved, but valuable space on the memory die is consumed
Solution Approach 1:
The patent makes the existing memory controller serve multiple functions: it normally manages flash memory operations and additionally performs OTP locking functions. The same controller logic that handles read/write operations also detects when an OTP area has been programmed and prevents subsequent writes, eliminating the need for separate locking circuitry.
Solution Approach 2:
The patent combines the OTP locking functionality with the existing memory controller and flash memory array. The locking mechanism is integrated into the normal memory operation flow, where the controller checks programming status during standard operations rather than requiring dedicated locking hardware.
3Ease of operation
If a single read voltage is used for all memory locations, then the read operation is simple, but detection of programmed cells in OTP area is less accurate
Solution Approach 1:
The patent applies different read voltages to different memory locations based on whether they are OTP or non-OTP areas. The memory controller detects the memory location type and selects appropriate voltage levels, optimizing detection accuracy for OTP cells while maintaining normal operation for other cells. This localized approach to voltage selection improves precision without overly complicating the overall system.
Data Source
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AI summary
A portion of a programmable memory device (104) is configured as a one-time programmable (OTP) memory, where in response to a write access to the memory device, a memory controller (118) determines whether the write access is associated with a memory location designated as an OTP memory location (404). If so, the memory controller performs a read of the memory location (408), and allows the write access only if each memory cell of the memory location is in an un-programmed state (410). Thus, only a single write access to an OTP memory location is permitted, and subsequent write attempts are disallowed. Further, to enhance detection of programmed cells, the read of the OTP memory location is performed with a lower read voltage than a read voltage associated with a write access (407) to a non-OTP memory location, thereby improving detection of programmed memory cells in the OTP memory location.