OTP Memory Read Sensing Circuit Design
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Solution Overview
Problem
Existing one time programmable (OTP) non-volatile memory technologies face challenges in accurately recognizing the storage states of OTP memory cells due to different structures and characteristics between fuse and anti-fuse types, requiring specific read sensing circuits which can be complex and prone to misjudgment.
Innovation Solution
A read sensing method where the bit line corresponding to the selected OTP memory cell remains continuously connected with the data line during the read cycle, allowing the cell current to charge the data line, and a sense amplifier compares the voltage level to determine the storage state, enabling continuous charging and accurate recognition of storage states without decoupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If different read sensing circuits are designed for fuse and anti-fuse type OTP memory cells, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal read sensing circuit that can accurately detect both fuse and anti-fuse type OTP memory cells using the same circuit architecture. The circuit achieves this by using a single-ended sensing approach with a data line that remains continuously connected, allowing the same circuit to adapt to different memory cell types through configuration bits rather than requiring separate dedicated circuits for each type.
2Reliability
If isolation transistors are used to decouple bit lines from sense lines during read operation, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent removes the isolation transistor component from the read sensing circuit entirely. Instead of using isolation transistors to decouple bit lines from sense lines, the invention uses a direct continuous connection between the bit line and data line, eliminating the need for isolation transistors and their associated control signals while maintaining read operation reliability through the continuous connection approach.
3Measurement precision
If bit line is decoupled from sense line during read operation, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent maintains continuous connection between the bit line and data line throughout the entire read operation, eliminating the decoupling step that causes time delays. The cell current continuously charges the data line capacitance from the initial voltage level to a final voltage level that reflects the storage state, allowing the sensing operation to proceed without interruption and reducing overall read time while maintaining detection accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for accurate and efficient recognition of storage states in OTP memory cells by continuously charging the data line with cell current, minimizing misjudgment and simplifying the read sensing process across different OTP memory cell types.
Implementation Method 1
the cell current outputted from the selected OTP memory cell can continuously charge the data line
Data Source
AI summary
A read sensing method for an OTP non-volatile memory is provided. The memory array is connected with plural bit lines. Firstly, a selected memory cell of the memory array is determined, wherein one of the plural bit lines connected with the selected memory cell is a selected bit line and the other bit lines are unselected bit lines. Then, the unselected bit lines are precharged to a precharge voltage. Then, the selected bit line is connected with the data line, and the data line is discharged to a reset voltage. After a cell current from the selected memory cell is received, a voltage level of the data line is gradually changed from the reset voltage. According to at least one result of comparing a voltage level of the data line with a comparing voltage, an output signal is generated.