OTS ESD Protection Circuits for Low-Area Thermal Runaway Control
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Solution Overview
Problem
Conventional ESD protection circuits for integrated circuits face challenges such as large die area occupation, high parasitic capacitance, thermal runaway, and increased manufacturing costs due to limited conductivity and non-linear area effects of OTS components, especially for multi-supply ICs with varying voltages.
Innovation Solution
The implementation of parallel and series ESD protection circuits using small-area OTS components connected in parallel with series resistors to distribute ESD current and prevent thermal runaway, combined with laterally-placed series-connected OTS components for multi-supply ICs, reduces die area and manufacturing costs while ensuring effective ESD protection across different supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection circuits using diode and SCR are used, then the circuit provides ESD protection, but the die area occupied is large (1,000-100,000 um2)
Solution Approach 1:
The patent changes the material parameter by using OTS (Ovonic Threshold Switch) material instead of conventional diode and SCR materials. This material substitution enables much higher current density (10^6 A/cm2 or higher) while occupying significantly less area (10-100 times reduction), directly resolving the contradiction between ESD protection capability and die area occupation.
2Reliability
If conventional ESD protection circuits using diode and SCR are used, then the circuit provides ESD protection, but the parasitic capacitance is large
Solution Approach 1:
By changing to OTS material with fundamentally different electrical characteristics, the patent achieves low parasitic capacitance as an inherent property of the new material system, thereby reducing the harmful effect on high-speed pins while maintaining ESD protection function.
3Area of stationary object
If a single large-area OTS component is used, then the ESD area is reduced, but thermal runaway occurs
Solution Approach 1:
The patent divides the ESD protection function into multiple small-area OTS components (e.g., 2x2, 3x3, or more units) instead of using a single large component. This segmentation distributes the current flow and heat generation across multiple units, preventing thermal runaway while achieving the same or better ESD protection performance with reduced total area.
4Reliability
If multiple OTS components are connected in series for large-supply ICs, then ESD protection for high voltage is achieved, but manufacturing cost increases due to extra processing steps
Solution Approach 1:
The patent merges multiple OTS components into a single integrated structure that can be formed in one processing step using lateral placement and connection techniques. This combining approach eliminates the need for multiple separate processing steps required by vertical stacking, thereby reducing manufacturing complexity and cost while achieving the required voltage rating through series connection of the merged components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively disperses ESD current across multiple small-area OTS components, preventing thermal runaway and reducing die area and manufacturing costs, while providing comprehensive ESD protection for ICs with varying supply voltages.
Implementation Method 1
when the applied voltage (V) is greater than a threshold voltage Vth, the OTS component changes from the OFF state to the ON state, and a conduction current (ION) flows through
Implementation Method 2
when V is less than a hold voltage Vhold (or, the current I is smaller than a hold current Ihold), the OTS component changes from the ON state to the OFF state
Implementation Method 3
small-area OTS components connected in parallel with series resistors to distribute ESD current and prevent thermal runaway
Data Source
AI summary
The present invention discloses parallel, series and hybrid ESD protection circuits. A preferred parallel ESD protection circuit comprises a plurality of ESD devices connected in parallel, with each comprising a resistor and an OTS component connected in series. A preferred series ESD protection circuit comprises a plurality of ESD devices connected in series, wherein the OTS components in all ESD devices are disposed on a same level. A preferred hybrid ESD protections circuit comprises ESD devices connected in parallel, as well as in series.