Output Buffer Tracking Circuit for Drain-Source Voltage Protection

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Solution Overview

Problem

The drain-source voltage of transistors in output buffers can briefly exceed their nominal voltage during voltage level switching, leading to issues such as gate oxide breakdown and hot carrier injection, which affect transistor reliability.

Innovation Solution

An output buffer design incorporating a first and second P-type transistor, a first and second N-type transistor, a control circuit, and a tracking circuit to generate gate control signals that adapt to the output signal voltage levels, preventing the drain-source voltage from exceeding the nominal voltage by quickly turning on or off the transistors as needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a stacked transistor configuration is used with supply voltage greater than nominal voltage, then the transistor can handle higher supply voltages, but the drain-source voltage may briefly exceed the nominal voltage during switching, causing gate oxide breakdown or hot carrier injection

Engineering Contradiction:
Improvesupply voltage handling capabilityVSAvoidtransistor reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The tracking circuit generates the second gate control signal in advance based on the output signal voltage level before the switching transition completes. This preliminary action ensures that the second transistor is already in the correct state (on or off) before the drain-source voltage could potentially exceed the nominal voltage, preventing the harmful voltage spike while maintaining the stacked transistor's ability to handle higher supply voltages

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The tracking circuit continuously monitors the output signal voltage level and uses this feedback to dynamically adjust the second gate control signal. This feedback mechanism ensures that the second transistor's gate voltage is always appropriately synchronized with the output voltage, preventing drain-source voltage from exceeding the nominal voltage during switching transitions while allowing the circuit to operate with supply voltages higher than the transistor's nominal voltage

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12587184B2Output buffer that can prevent drain-source voltage of transistor from briefly exceeding nominal voltage
Publication Date: 2026.03.24 FARADAY TECH CORP
  • US12587184B2 patent drawing
  • US12587184B2 patent drawing
  • US12587184B2 patent drawing

AI summary

An output buffer includes a first P-type transistor, a second P-type transistor, a first N-type transistor, a second N-type transistor, a control circuit, and a tracking circuit. The second P-type transistor and the first P-type transistor are coupled between a supply voltage and a pad, and the second N-type transistor and the first N-type transistor are coupled between a ground voltage and the pad. The control circuit is arranged to generate two first gate control signals according to a control signal for controlling the first P-type transistor and the first N-type transistor. The tracking circuit is coupled to the pad, and is arranged to generate a second gate control signal according to the output signal for controlling the second P-type transistor or the second N-type transistor.