Output Driver Mitigating Intersymbol Interference via Pumping
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Solution Overview
Problem
Existing output drivers in transmission and reception systems experience intersymbol interference (ISI), including pre-cursor and post-cursor interference, when continuously transmitting data, which affects data integrity and reliability.
Innovation Solution
The proposed output driver architecture includes pre drivers, main drivers, and post drivers with distinct pumping operations and capacitors, each connected to a data terminal, performing specific operations during different half cycles of a clock signal to mitigate ISI by adjusting supply voltages and capacitor charges, thereby removing pre-cursor and post-cursor interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is continuously transmitted through the channel, then transmission speed and productivity are improved, but intersymbol interference (ISI) occurs causing data integrity deterioration
Solution Approach 1:
The pre driver performs preliminary actions by pre-charging capacitors and pre-driving signals before the main driver operates. This preliminary action prepares the signal path in advance, compensating for potential interference effects before they occur, thereby maintaining data integrity during continuous high-speed transmission
Solution Approach 2:
The pre driver and post driver act as intermediary components between the main driver and the channel. These intermediaries perform buffering and signal conditioning operations that mitigate the direct impact of ISI, allowing continuous transmission without compromising data integrity
2Reliability
If pre driver and post driver circuits are added to mitigate ISI, then data integrity is improved, but device complexity increases
Solution Approach 1:
The pre driver and post driver are merged with the main driver into a unified output driver structure that shares common components such as power supply circuits, control logic, and capacitor networks. This merging approach reduces the overall device complexity while maintaining the ISI mitigation functionality
Solution Approach 2:
The pre driver and post driver circuits are designed with multi-functionality, serving both as signal conditioning elements for ISI mitigation and as part of the overall data transmission control system. This universal design reduces the need for separate dedicated circuits, thereby managing device complexity
Data Source
AI summary
An output driver includes a pre driver including pre driving circuits, each including first and second pre pumps, and a main driver including main driving circuits, each including first and second main pumps. Each of the first and second pre pumps includes a first driving capacitor, and each of the first and second main pumps includes a second driving capacitor. During a first half cycle of a clock signal, the first pre pump and the first main pump perform a precharge operation, and the second pre pump and the second main pump perform a first driving operation, and during a second half cycle of the clock signal, the first pre pump and the first main pump perform the first driving operation, and the second pre pump and the second main pump perform the precharge operation. Capacitances of the first and second driving capacitors are different.


