Output Driver Circuit Calibration for Slew Rate Stability

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in maintaining stable slew rates and high output waveform quality due to variations in process, power supply voltage, and temperature, which affect the current drivability of pull-up and pull-down drivers, leading to mismatched slew rates and potential deterioration of output data signals.

Innovation Solution

The output driver circuit employs a calibration system that adjusts the current drivability of pull-up and pull-down sub-drivers by selecting transistors with equal on-resistance, using calibration signals to ensure equal pull-up and pull-down current drivability, and calibrates the timing of transistor activation to maintain consistent slew rates and reduce variations in output waveform quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the current drivability of pull-up and pull-down drivers is adjusted without calibration, then the circuit operation is simple, but the slew rate becomes unstable and output waveform quality deteriorates due to variations in process, power supply voltage, and temperature

Engineering Contradiction:
Improveslew rate stabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing calibration of the pull-up and pull-down drivers before normal operation. The calibration circuit pre-adjusts the current drivability of these drivers to match each other, storing the calibration results in registers. This preliminary adjustment ensures that when the memory device operates under various conditions (process variations, voltage changes, temperature fluctuations), the slew rate remains stable without requiring real-time adjustments during normal operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a calibration circuit as an intermediary component that mediates between the pull-up and pull-down drivers. This calibration circuit includes calibration transistors, calibration signals, and control logic that temporarily activates during calibration mode to adjust the current drivability of the drivers. The intermediary calibration mechanism enables precise matching of driver characteristics without complicating the main data path circuitry.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If calibration signals are used to adjust transistor activation timing, then the output waveform quality improves, but the control complexity increases

Engineering Contradiction:
Improveoutput waveform qualityVSAvoidcontrol signal complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the driver circuit into multiple sub-drivers (first pull-up sub-driver, second pull-up sub-driver, first pull-down sub-driver, second pull-down sub-driver), each with adjustable current drivability. By dividing the drivers into segments, the calibration process can independently adjust each segment's characteristics using dedicated calibration signals, enabling precise control of the overall output waveform without requiring complex global control mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic adjustment capabilities where the current drivability of each sub-driver can be dynamically changed through calibration signals during manufacturing or initialization. The calibration process dynamically adjusts the activation timing and current strength of transistors within each sub-driver, allowing the circuit to adapt to process variations and maintain optimal performance across different operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8767486B2Output driver circuit, output driver system and semiconductor memory device
Publication Date: 2014.07.01 KIOXIA CORP
  • US8767486B2 patent drawing
  • US8767486B2 patent drawing
  • US8767486B2 patent drawing

AI summary

The output driver circuit includes a plurality of pull-up sub-drivers that pull up a voltage at the output terminal according to a pull-up signal based on the output data. The output driver circuit includes a plurality of pull-down sub-drivers that pull down the voltage at the output terminal according to a pull-down signal based on the output data. Selection from among the pull-up sub-drivers is made by an assigned pull-up calibration signal and selection from among the pull-down sub-drivers by an assigned pull-down calibration signal so as to make a pull-up current drivability and a pull-down current drivability for the voltage at the output terminal equal. A timing of turning on of the pull-up sub-drivers is calibrated by the pull-down calibration signal. A timing of turning on of the pull-down sub-drivers is calibrated by the pull-up calibration signal.