Over-driving Circuit for Semiconductor Memory Devices
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Solution Overview
Problem
Semiconductor memory devices face challenges in reducing current consumption and maintaining amplification efficiency due to decreasing power supply voltage levels, which affect the bit line sense amplifier's ability to rapidly sense and amplify signals effectively.
Innovation Solution
An over-driving circuit that includes a voltage change sensor, high voltage controller, and voltage adjustor to detect and respond to changes in power supply voltage levels, adjusting charging and discharging times for the bit line sense amplifier's pull-up line to optimize voltage levels and reduce current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a higher voltage level (High_VDD) is applied to the pull-up line RTO for over-driving operation, then the amplification speed of the BLSA is improved, but current consumption increases and core voltage noise is generated
Solution Approach 1:
The patent applies dynamics by making the over-driving voltage level adjustable rather than fixed. The voltage adjustor dynamically selects between different voltage levels (High_VDD or Low_VDD) based on actual operating conditions, allowing the system to optimize between amplification speed and current consumption in real-time
Solution Approach 2:
The patent changes the voltage level parameter dynamically. By providing multiple voltage level options (High_VDD and Low_VDD) and selecting appropriately based on operating conditions, the system optimizes the balance between achieving sufficient amplification speed and minimizing current consumption
2Use of energy by moving object
If a lower voltage level (Low_VDD) is applied to the pull-up line RTO for over-driving operation, then current consumption is reduced, but the amplification speed decreases and over-driving efficiency is reduced
Solution Approach 1:
The system dynamically adjusts the voltage level based on actual operating conditions. When fast amplification is needed, High_VDD is applied; when power saving is prioritized and speed requirements are met, Low_VDD is used, optimizing the trade-off between current consumption and amplification speed
Solution Approach 2:
The voltage level parameter is changed dynamically based on operational needs. The voltage adjustor selects between High_VDD and Low_VDD, allowing the system to reduce current consumption when possible while maintaining adequate amplification performance
3Device complexity
If the same over-driving timing is always applied regardless of power supply voltage level changes, then the control circuit is simple, but core voltage noise is generated and capacitance stress increases when voltage levels change
Solution Approach 1:
The voltage change sensor provides feedback about the actual power supply voltage level to the voltage adjustor. This feedback mechanism allows the system to detect voltage level changes and adjust the over-driving timing accordingly, preventing core voltage noise and capacitance stress while maintaining appropriate control complexity
Solution Approach 2:
The system automatically adjusts its own operation based on detected voltage conditions. The voltage change sensor and voltage adjustor work together to self-regulate the over-driving timing according to actual voltage levels, eliminating the need for complex external control while preventing harmful effects
Data Source
AI summary
An over-driving circuit for a semiconductor memory device is capable of rapidly securing a sensing operation of a bit line sense amplifier regardless of a level change of a power supply voltage. Timings are adjusted for supplying an over-driving voltage and for discharging based on a level change of a power supply voltage if a level thereof is changed when a bit line over-driving operation is in progress, thereby preventing an efficiency reduction of the over-driving operation.