Overdrive Period Control Device for DRAM Voltage Adjustment
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Solution Overview
Problem
Conventional overdrive period control devices for DRAMs struggle to adjust the overdrive period sufficiently across the operating range of power source voltages, especially at the high end, due to their dependence on inverter properties and the difficulty in generating a second internal power source voltage, leading to inadequate control and potential data reading errors.
Innovation Solution
The proposed solution involves a circuit configuration that includes a pre-charge circuit, a delay element, a comparison circuit, and a logic circuit to determine the overdrive period based on an inverse or proportional relationship with the power source voltage, allowing for adjustable overdrive periods through a reference potential, enabling sufficient adjustment over the operating range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the inverter property is used to control the overdrive period, then the overdrive period can be adjusted at the low side of power source voltage, but the adjustment range becomes insufficient at the high side of power source voltage
Solution Approach 1:
The patent changes the control parameter from inverter delay time to RC circuit time constant by changing the physical state (charging/discharging process). The overdrive period is controlled by adjusting the reference potential level rather than relying on inverter voltage-dependent delay, enabling sufficient adjustment range across the entire operating voltage range including the high side
Solution Approach 2:
The patent replaces the inverter-based delay mechanism with an RC circuit charging/discharging mechanism. This substitution eliminates the voltage-dependent delay characteristic of inverters and provides a more predictable and adjustable time constant that works effectively across the full operating voltage range
2Adaptability or versatility
If a second internal power source voltage is generated to maintain constant control range, then the overdrive period control range can be maintained constant, but the circuit complexity increases due to difficulty in generating the second voltage
Solution Approach 1:
The patent makes the single internal power source voltage serve multiple functions: it powers both the comparison circuit and the delay circuit, eliminating the need for a separate second voltage. The reference potential derived from this single voltage source provides the control reference, achieving constant control range without additional voltage generation circuits
Solution Approach 2:
The patent extracts only the essential function needed from the proposed second voltage source by using the existing internal power source voltage to generate the reference potential. This removes the unnecessary complexity of generating and managing a second voltage while maintaining the beneficial effect of voltage-independent control range
3Reliability
If the overdrive period is extended to ensure sufficient overdrive, then data reading accuracy improves, but excessive overdrive occurs causing internal power source voltage to exceed external power source voltage
Solution Approach 1:
The patent uses feedback by comparing the delayed signal with the reference potential to automatically determine when the overdrive period should end. The comparison circuit detects when the charging/discharging process reaches the reference level, providing feedback that stops the overdrive signal, thus preventing excessive overdrive while ensuring sufficient duration for accurate reading
Solution Approach 2:
The patent implements dynamic control where the overdrive period is automatically adjusted based on the actual voltage levels and timing. The RC circuit naturally adapts its charging/discharging rate to the current voltage conditions, and the comparison with reference potential dynamically determines the exact endpoint, preventing both insufficient and excessive overdrive
Data Source
AI summary
An overdrive period control device includes a pre-charge circuit connected to a node on which a potential is detected and for raising a potential at the node to a first potential; a delay element one terminal of which is connected to the node; a charge circuit supplying a power source voltage to the other terminal of the delay element at the input timing of a signal from the outside and raising the potential at the node to the power source voltage; and a comparison circuit comparing the potential at the node with a reference potential and detecting the timing at which both levels of the potentials coincide. The device outputs a signal indicating a period determined by the input timing of the signal from the outside and the timing in which the comparison circuit detects that the levels coincide.