Overlay Data Feeding for Lithography Alignment

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Solution Overview

Problem

The miniaturization of integrated circuits poses a challenge in accurately forming and aligning patterns during the lithography process, leading to increased time consumption and costs due to demanding overlay performance requirements, as existing methods are inefficient in measuring and correcting patterns accurately and quickly.

Innovation Solution

A method involving a substrate with exposure fields and overlay marks to measure and adjust lithography patterns, allowing for the collection of overlay data to form accurate and efficient second-layer patterns, incorporating deformations, rotations, and shifts, thereby improving alignment and reducing production time and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If extensive measurement operations are performed to ensure accurate alignment and overlay performance, then manufacturing precision is improved, but productivity deteriorates due to time consumption

Engineering Contradiction:
Improveoverlay accuracyVSAvoidthroughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent performs overlay measurement on the first layer pattern before forming the second layer pattern. This preliminary measurement allows the system to obtain overlay data and generate correction data in advance, so that when the second layer is formed, the alignment can be quickly adjusted using pre-calculated correction values, eliminating the need for time-consuming measurements during the second layer formation process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where overlay measurement data from the first layer is used to generate correction data that is then applied to the formation of the second layer pattern. The measuring system provides feedback about alignment accuracy, and this feedback is used by the exposure system to adjust and correct the alignment for subsequent layers, creating a closed-loop control system that improves precision without proportionally increasing measurement time

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If extensive measurement operations are performed to ensure accurate alignment, then manufacturing precision is improved, but loss of time increases

Engineering Contradiction:
Improvealignment accuracyVSAvoidmeasurement time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs overlay measurement on the first layer pattern before forming the second layer pattern. This preliminary measurement allows the system to obtain overlay data and generate correction data in advance, so that when the second layer is formed, the alignment can be quickly adjusted using pre-calculated correction values, eliminating the need for time-consuming measurements during the second layer formation process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses overlay marks that are identical to the actual pattern structures being formed. By measuring these marks with the same lithography and etching processes, the system obtains accurate overlay data that directly reflects the actual manufacturing conditions, eliminating the need for separate measurement processes and reducing overall measurement time

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the accurate and rapid formation of integrated circuits by measuring and adjusting overlay data, ensuring precise alignment and reducing production costs by incorporating comprehensive overlay data for both point and deformation corrections in the lithography process.

Implementation Method 1

One form of specialized inspection tool is a scatterometer in which a beam of radiation is directed onto a target on the surface of the substrate and properties of the scattered or reflected beam are measured

Methodology Applied
Scientific EffectScattering: Scattering

Implementation Method 2

properties of the scattered or reflected beam are measured

Methodology Applied
Scientific EffectReflection: Reflection

Data Source

PatentUS9871001B2Feeding overlay data of one layer to next layer for manufacturing integrated circuit
Publication Date: 2018.01.16 UNITED MICROELECTRONICS CORP
  • US9871001B2 patent drawing
  • US9871001B2 patent drawing
  • US9871001B2 patent drawing

AI summary

A method of manufacturing an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the exposure fields includes a target portion and a set of overlay marks. The substrate is exposed to form a first layer lithography pattern on the target portion for the respective exposure field by an exposure system. The overlay of the first layer lithography pattern and the target portion is measured by the set of overlay marks of each exposure field to obtain first overlay data for the respective exposure field by a measuring system. The first overlay data is fed to form a second layer lithography pattern.