Overlay Key Pattern Layout for Precise Semiconductor Alignment
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Solution Overview
Problem
As integration density of semiconductor devices increases, accurately forming patterns at desired positions becomes challenging, affecting alignment between layers and overall device reliability.
Innovation Solution
A semiconductor device design incorporating an overlay key region with hexagonal-shaped key patterns arranged in a honeycomb pattern, reducing the area of the overlay key region and maximizing the distance between key patterns for improved alignment and recognition during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the overlay key region area is reduced to increase integration density, then the integration density is improved, but the pattern recognition accuracy and alignment precision may deteriorate
Solution Approach 1:
The overlay key region is segmented into multiple discrete key patterns (first through seventh key patterns) arranged in a hexagonal configuration. This segmentation allows the total area to be reduced while maintaining sufficient recognition features distributed across the compact hexagonal arrangement, resolving the contradiction between small area and accurate pattern recognition.
Solution Approach 2:
The key patterns are arranged in a two-dimensional hexagonal configuration rather than a linear or rectangular arrangement. This dimensional optimization allows maximum spacing between patterns within a minimized area footprint, achieving both compact size and adequate recognition accuracy simultaneously.
2Manufacturing precision
If more key patterns are added to improve alignment accuracy, then the alignment precision is improved, but the overlay key region area increases
Solution Approach 1:
The overlay key region employs an asymmetric hexagonal arrangement of key patterns rather than a symmetric rectangular grid. This asymmetric configuration optimizes the spatial distribution of seven key patterns to provide comprehensive alignment information while minimizing the enclosing area, achieving high alignment accuracy without proportional area increase.
Solution Approach 2:
The hexagonal arrangement of key patterns serves multiple functions simultaneously: it provides alignment references for multiple lithography steps, enables both x and y direction alignment, and offers redundancy for error correction. This multi-functionality allows seven patterns to achieve the alignment precision of what would traditionally require more patterns in a less efficient arrangement.
3Measurement precision
If the distance between key patterns is increased to improve recognition accuracy, then the pattern recognition accuracy is improved, but the overlay key region area increases
Solution Approach 1:
The key patterns are positioned at the vertices and center of a hexagon, utilizing two-dimensional spatial optimization. This arrangement maximizes the distance between patterns in multiple directions (six symmetry directions) while keeping the overall enclosing area minimal, achieving both large inter-pattern spacing and compact region size simultaneously.
Solution Approach 2:
The hexagonal configuration provides a more compact, rounded boundary compared to rectangular arrangements. This geometric optimization allows the key patterns to be spaced further apart while maintaining a smaller enclosing footprint, as the hexagonal shape more efficiently contains the distributed patterns than angular rectangular boundaries.
Data Source
AI summary
A semiconductor device includes a substrate including an overlay key region and a plurality of key patterns on the overlay key region. The plurality of key patterns include first to seventh key patterns. The second to seventh key patterns are arranged to enclose the first key pattern in a clockwise direction and to have center points forming a hexagonal shape.