Oversampled Data Recovery Without Clock Preamble Overhead
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Solution Overview
Problem
Conventional clock and data recovery technologies for plesiochronous systems require significant overhead in the form of clock recovery preambles, which consume communication bandwidth and compromise timing stability for speed of lock, especially in high-speed applications such as Fiber Channel switches and all-optical switches.
Innovation Solution
The method involves oversampling data signals with reference to a sample parameter like phase, generating sample sets, and storing them in memory for post-processing to determine suitable samples or subsets for clock and data recovery, eliminating the need for a clock recovery preamble and enabling instantaneous data recovery without re-clocking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a clock recovery preamble is added before data transmission, then the receiving device can detect and synchronize the clock rate, but the overhead increases and communication bandwidth is consumed
Solution Approach 1:
The patent extracts the clock recovery function from the traditional preamble structure by using a separate phase detector that operates independently on the data stream. This allows clock synchronization to be achieved without consuming transmission bandwidth for a dedicated preamble, as the phase information is derived directly from the data itself through the phase detector and accumulator mechanism.
Solution Approach 2:
The patent introduces an accumulator as an intermediary component that integrates phase error information over time. This accumulator acts as a mediator between the phase detector and the clock recovery mechanism, allowing gradual clock rate adjustment based on accumulated phase differences without requiring explicit preamble signals, thereby maintaining synchronization while avoiding bandwidth overhead.
2Speed
If a CDR circuit with a short time constant is used, then the lock speed increases, but timing stability is sacrificed
Solution Approach 1:
The patent implements a dynamic time constant mechanism where the accumulator's integration period adapts based on the locking state. During initial acquisition, the effective time constant is shorter to enable faster lock, while during steady-state operation, the accumulation continues to provide fine timing stability. This dynamic adjustment resolves the contradiction between fast locking and timing stability.
Solution Approach 2:
The patent uses periodic sampling of the data stream by the phase detector, where each data transition provides a phase measurement opportunity. This periodic action allows the system to accumulate phase information at regular intervals, enabling both rapid initial locking (by processing each sample quickly) and sustained timing stability (through continuous accumulation over many periods).
Data Source
AI summary
A method for recovering data includes oversampling an input data signal to provide sample sets, and storing a plurality of sample sets in addressable memory. The sample sets are processed, using sequential logic to make determinations of respective samples suitable for use in data recovery from corresponding sample sets. One function applied for the determination, includes taking a first mean transition position in a first group of sample sets, taking a second mean transition position in a second group of sample sets, computing a slope value for change in transition position, and making the determination based on the order of the plurality of samples, the first and second means, and the slope. The determined samples are obtained and data recovery is achieved. Sample sets can be modified according to equalization functions. Other modifications include encoding the sample sets for data compression.