Oxide Semiconductor DRAM Word-Line Duty Control for Threshold Stability
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Solution Overview
Problem
The use of oxide semiconductor transistors in DRAM memory cells is hindered by significant fluctuations in threshold voltage due to Positive Bias Temperature Instability (PBTI) and Negative Bias Temperature Instability (NBTI) characteristics, leading to defective bits and reduced reliability.
Innovation Solution
The implementation of a duty cycle control mechanism for word lines, where the voltage polarity of non-selected word lines is reversed relative to selected word lines, and the duty ratio is optimized to minimize bias application time, thereby reducing PBTI and NBTI effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If oxide semiconductor transistors are used in DRAM memory cells, then new material benefits are achieved, but threshold voltage fluctuations occur due to PBTI and NBTI characteristics
Solution Approach 1:
The patent applies periodic action by implementing a duty cycle control mechanism that alternates the voltage polarity of non-selected word lines between positive and negative states. This periodic polarity reversal prevents the accumulation of bias stress that causes PBTI and NBTI effects, thereby stabilizing the threshold voltage of oxide semiconductor transistors while maintaining the benefits of using this material in DRAM memory cells.
2Ease of operation
If continuous bias is applied to word lines, then operational control is maintained, but PBTI and NBTI effects cause characteristic deterioration
Solution Approach 1:
The patent employs inversion by reversing the voltage polarity of non-selected word lines instead of maintaining a continuous positive or negative bias. By alternating the polarity periodically, the system maintains operational control capability while counteracting the cumulative damage from PBTI and NBTI effects, thus improving transistor characteristic stability without sacrificing ease of operation.
3Reliability
If duty ratio is increased to minimize bias application time, then PBTI and NBTI effects are reduced, but operational timing becomes more constrained
Solution Approach 1:
The patent applies parameter changes by optimizing the duty ratio parameter of the periodic polarity reversal waveform. By carefully selecting the duty ratio, the patent minimizes the total time that bias is applied to word lines, thereby reducing PBTI and NBTI effects, while still maintaining sufficient time for proper memory cell operation and data access. This parameter optimization balances reliability improvement with timing constraints.
Data Source
AI summary
Memory cells correspond to crossing positions of word lines and bit lines and are formed by using oxide semiconductor. A word-line controller changes a voltage of a first word line selected in accordance with a first address to activate or deactivate the first word line. A sense amplifier detects and latches data of first memory cells connected to the first word-line. A read circuit reads out data latched by the sense amplifier to outside successively in accordance with second addresses. In a read operation, after activation of the first word line, the sense amplifier latches the data of the first memory cells. Before the read circuit ends a successive read operation in which the read circuit successively reads out the data of the first memory cells from the sense amplifier in accordance with the second addresses, the word-line controller deactivates the first word line.