Oxide Semiconductor DRAM Channel Structure for Low Leakage
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Solution Overview
Problem
As semiconductor devices, particularly DRAM devices, are downscaled, the leakage current through the channel region increases due to the reduction in size, which is exacerbated by the use of conventional transistor materials.
Innovation Solution
The semiconductor device incorporates a capacitor structure with a mold insulating layer, channel layers on bit lines, and word lines arranged on sidewalls of these channel layers, along with a trimming insulating block to connect word line ends, utilizing oxide semiconductor materials for the channel layers to reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the size of the DRAM device is reduced through downsaling, then the device density and integration are improved, but the leakage current through the channel region increases
Solution Approach 1:
The patent changes the material parameter of the channel layer from conventional semiconductor materials to oxide semiconductor materials. This material parameter change fundamentally alters the electrical characteristics, enabling ultra-low leakage current operation while maintaining the downscaled device dimensions. The oxide semiconductor material's wide bandgap and low carrier concentration are key parameter changes that resolve the leakage issue.
Solution Approach 2:
The patent employs a composite structure combining oxide semiconductor material with conventional semiconductor materials in the channel layer. This composite approach allows the device to benefit from both the low leakage characteristics of oxide semiconductors and the成熟的 fabrication processes of conventional semiconductors, achieving reduced leakage current in downscaled devices.
2Ease of manufacture
If conventional transistor materials are used in downscaled devices, then the manufacturing process is simpler, but the leakage current increases due to size reduction
Solution Approach 1:
The patent changes the material parameter of the channel layer from conventional semiconductor materials to oxide semiconductor materials. This material parameter change fundamentally alters the electrical characteristics, enabling ultra-low leakage current operation while maintaining the downscaled device dimensions. The oxide semiconductor material's wide bandgap and low carrier concentration are key parameter changes that resolve the leakage issue.
3Adaptability or versatility
If word line contacts are arranged flexibly in the interface area, then the device design freedom and integration are improved, but the contact resistance may increase
Solution Approach 1:
The patent introduces a trimming insulating block as an intermediary structure in the interface area. This block serves as a mediator that enables flexible word line contact arrangements while maintaining low contact resistance. The trimming insulating block provides a controlled interface between the word lines and contact structures, allowing design flexibility without compromising electrical connectivity.
Data Source
AI summary
A semiconductor device includes: a substrate including a cell array area, a periphery circuit area, and an interface area; bit lines arranged in the cell array area and extending in a first horizontal direction; a mold insulating layer arranged on the bit lines and including openings extending in a second horizontal direction; channel layers respectively arranged on the bit lines in each of the openings; word lines respectively arranged on the channel layers and extending in the second horizontal direction from the cell array area to the interface area, the word lines including a first word line on a first sidewall of each opening of the mold insulating layer and a second word line on a second sidewall of the opening; and a trimming insulating block arranged in the interface area and connected to an end of the first word line and an end of the second word line.