Oxide Semiconductor Gate Insulator Layout for Low Off-Leakage

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Solution Overview

Problem

Existing oxide semiconductor transistors face challenges in minimizing off-leakage current due to the leakage current flowing through the gate insulating layer, which affects the reliability and dielectric constant, particularly when the gate electrode's metal enters the insulating layer.

Innovation Solution

A semiconductor device design featuring a gate insulating layer with a nitrogen-containing first film positioned between the gate electrode and a nitrogen-free or low-nitrogen second film, spaced from the first electrode, reduces the off-leakage current by increasing the dielectric constant and suppressing metal intrusion, while optimizing the distance and thickness of the insulating layers to enhance the gate fringe electric field.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional gate insulating layer is used in contact with the gate electrode, then the device structure is simple, but off-leakage current increases due to metal component interaction

Engineering Contradiction:
Improveoff-leakage currentVSAvoidgate insulating layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate insulating layer is divided into multiple regions with different nitrogen concentrations: a first region (higher nitrogen concentration) adjacent to the gate electrode, and a second region (lower nitrogen concentration) adjacent to the oxide semiconductor layer. This segmentation reduces off-leakage current by preventing metal component interaction while maintaining device performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the gate insulating layer are doped with nitrogen at different concentrations to perform different functions: the first region with higher nitrogen concentration suppresses off-leakage current by forming a barrier against metal component interaction, while the second region with lower nitrogen concentration maintains good interface characteristics with the oxide semiconductor layer.

Inventive Principle:
Principle #3Local quality

2Reliability

If the gate insulating layer is positioned close to the first electrode to reduce distance, then manufacturing is easier, but leakage current increases due to metal interaction

Engineering Contradiction:
Improveleakage current suppressionVSAvoiddistance between gate insulating layer and first electrode
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The first region of the gate insulating layer with higher nitrogen concentration acts as an intermediary barrier between the gate electrode and the oxide semiconductor layer, preventing direct interaction between metal components while maintaining an optimized distance configuration that suppresses leakage current.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If nitrogen concentration is increased throughout the gate insulating layer to reduce leakage, then off-leakage current decreases, but on-current and charge storage characteristics deteriorate

Engineering Contradiction:
Improveoff-leakage currentVSAvoidon-current and charge storage
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The gate insulating layer has non-uniform nitrogen concentration distribution: the first region adjacent to the gate electrode has higher nitrogen concentration to suppress off-leakage current, while the second region adjacent to the oxide semiconductor layer has lower nitrogen concentration to maintain good interface characteristics and ensure adequate on-current and charge storage performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces off-leakage current and increases on-current by controlling the nitrogen concentration and thickness of the gate insulating layers, improving the transistor's performance and reliability.

Implementation Method 1

a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N)

Methodology Applied
Scientific EffectDielectric: Dielectric

Implementation Method 2

An oxide semiconductor transistor in which a channel is formed in an oxide semiconductor layer has an excellent characteristic that the channel leakage current during off operation is very small

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20230328957A1Semiconductor device and semiconductor memory device
Publication Date: 2023.10.12 KIOXIA CORP
  • US20230328957A1 patent drawing
  • US20230328957A1 patent drawing
  • US20230328957A1 patent drawing

AI summary

A semiconductor device of embodiments includes: a first electrode; a second electrode; an oxide semiconductor layer provided between the first electrode and the second electrode; a gate electrode surrounding the oxide semiconductor layer; and a gate insulating layer provided between the gate electrode and the oxide semiconductor layer, spaced from the first electrode, and containing nitrogen (N). In addition, a first distance between the first electrode and the gate insulating layer in a first direction from the first electrode to the second electrode is smaller than a second distance between the first electrode and the gate electrode in the first direction.