Oxide NOR Gate Circuit Threshold Loss Elimination
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Solution Overview
Problem
The NOR gate circuit formed by Oxide TFTs suffers from threshold loss due to its depletion mode nature, affecting the operating performance by reducing the amplitude of output signals.
Innovation Solution
Incorporating a first capacitor to maintain a high gate-to-source voltage of the first transistor when the NOR gate outputs a high level, eliminating threshold loss and enabling faster transition speeds and better operating performance through a simple circuit structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If Oxide TFT is adopted to form an NOR gate circuit, then high mobility ratio and good uniformity are achieved, but threshold loss occurs affecting operating performance
Solution Approach 1:
The pulling-up module performs preliminary action by proactively pulling up the potential at the first node to a high level before the Oxide TFT can cause threshold loss. This preemptive voltage restoration ensures that when the TFT switches, the full voltage swing is available, eliminating the threshold loss effect and maintaining reliable operating performance while preserving the high mobility ratio benefits
2Ease of operation
If Oxide TFT remains in turning-on status at zero gate-to-source voltage, then depletion mode operation is achieved, but voltage loss occurs at output terminal
Solution Approach 1:
The first capacitor acts as an intermediary element that couples the output terminal to the first node. It transfers the pulled-up potential from the first node to the output terminal, ensuring that the output receives the full high level voltage even when the Oxide TFT is in depletion mode. This intermediary mechanism eliminates the voltage loss while maintaining the ease of depletion mode operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for NOR operations without threshold loss, achieving faster transition speeds and improved performance by maintaining a sufficient gate-to-source voltage, thus enhancing the overall operating efficiency of the NOR gate circuit.
Implementation Method 1
a first capacitor C1, having a first terminal connected to the first node VA and a second terminal connected to the output terminal VOUT
Data Source
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AI summary
Provided are an NOR gate circuit, a shift register, an array substrate and a display apparatus, wherein the NOR gate circuit comprises a first inverter (11) and a second inverter (12), each of the first inverter (11) and the second inverter (12) having an input terminal (VIN), a high voltage terminal (VGH), a low voltage terminal (VGL) and an output terminal (VOUT), the output terminal (VOUT) of the first inverter (11) being connected to the high voltage terminal (VGH) of the second inverter, and wherein at least one of the first inverter and the second inverter comprises: a first transistor (T1; T5) having a gate connected to a first node (VA), a first electrode connected to the high voltage terminal (VGH) and a second electrode connected to the output terminal (VOUT), a first capacitor (C1; C2) having a first terminal connected to the first node (VA) and a second terminal connected to the output terminal (VOUT), a pulling-up module (12a) being configured to pull up a potential at the first node (VA) by a potential at the high voltage terminal (VGH) in a case where the high voltage terminal (VGH) is at a high level, and a pulling-down module (12b) being configured to pull down a potential at the first node (VA) and a potential at the output terminal (VOUT) by a potential at the low voltage terminal (VGL) under a control of a signal received by the input terminal (VIN). The threshold loss existing in the NOR gate circuit formed by an Oxide TFT can be eliminated.