Oxide Semiconductor Transistor Driving Method for Data Retention
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Solution Overview
Problem
Current semiconductor storage devices, such as DRAM and SRAM, face challenges with short data retention times due to leakage currents and the need for frequent refresh operations, while flash memory suffers from limited write cycles and high voltage requirements, making them unsuitable for applications requiring long-term data retention and frequent rewriting.
Innovation Solution
A semiconductor device with a transistor channel region in an oxide semiconductor layer that retains electric charge in a node connected to the source or drain, using a driving method involving a writing period, an inverted period with negative potential application, and a retention period with a specific potential to maintain the off-state, reducing transient currents and extending data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a transistor with oxide semiconductor channel is used to retain electric charge, then data retention time is extended, but transient current is generated in the gate after writing
Solution Approach 1:
The patent applies periodic voltage pulses to the gate, including a writing period with first potential, an inverted period with second potential (opposite polarity), and a retention period with third potential. This periodic action suppresses transient current while maintaining the off-state and extending data retention time in oxide semiconductor transistors.
Solution Approach 2:
The patent changes the voltage potential parameters applied to the gate across different time periods. By applying first potential during writing, second potential (with opposite polarity) during inverted period, and third potential during retention period, the patent controls transient current and extends data retention time.
2Speed
If conventional DRAM is used for storage, then writing and reading is fast, but data retention time is short due to leakage current requiring frequent refresh operations
Solution Approach 1:
The oxide semiconductor transistor inherently provides extremely low leakage current in the off-state, enabling self-retention of electric charge without external refresh operations. This maintains fast write/read speeds while extending data retention time indefinitely.
3Duration of action of stationary object
If flash memory is used for storage, then data retention time is extremely long, but high voltage is required and the number of writing operations is limited
Solution Approach 1:
The patent uses controlled voltage potential changes (first, second, and third potentials) applied to the gate of oxide semiconductor transistors to achieve long data retention time without requiring high voltage circuits or floating gates, enabling frequent writing operations.
4Loss of energy
If conventional transistor is used, then off-state current is high, but applying negative potential to gate can suppress transient current and extend retention time
Solution Approach 1:
The patent implements periodic gate potential application with distinct phases: writing period with first potential, inverted period with second potential (opposite polarity) to suppress transient current, and retention period with third potential. This reduces off-state current and extends retention time while maintaining operational simplicity.
Solution Approach 2:
The patent dynamically changes gate potential parameters across different time periods, applying first potential during writing, second potential with opposite polarity during inverted period to suppress transient current, and third potential during retention, thereby reducing off-state current effectively.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method effectively suppresses the temporal change of stored data by promoting the convergence of positive electric charge accumulation in the oxide semiconductor layer, thereby enhancing data retention without limitations on the number of write operations and reducing power consumption.
Implementation Method 1
a channel region included in an oxide semiconductor layer 140...positive electric charge is accumulated in the node
Implementation Method 2
a gate insulating film 108a provided over the channel region 116...electric charge is retained in a node electrically connected to one of a source and a drain
Data Source
AI summary
A period (inverted period) in which a high negative potential is applied to a gate of the transistor is provided between a writing period and a retention period. In the inverted period, supply of positive electric charge from the drain of the transistor to the oxide semiconductor layer is promoted. Thus, accumulation of positive electric charge in the oxide semiconductor layer or at the interface between the oxide semiconductor layer and a gate insulating film can converge in a short time. Therefore, it is possible to suppress a decrease in the positive electric charge in the node electrically connected to the drain of the transistor in the retention period after the inverted period. That is, the temporal change of data stored in the semiconductor device can be suppressed.