Oxide Semiconductor Memory Transistor with Dual Gate for Low Power Retention
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Solution Overview
Problem
Flash memory devices face high power consumption during data writing and erasing, short data retention periods, and limited rewrite cycles due to high voltage requirements and gate insulating film deterioration.
Innovation Solution
A memory device using a transistor with a wider band gap semiconductor material, such as an oxide semiconductor, and a second gate electrode to control threshold voltage, reducing off-state current and power consumption, while extending data retention and increasing rewrite frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is applied to accumulate electrical charge in a floating gate for data retention, then data storage capability is improved, but power consumption increases and gate insulating film deteriorates
Solution Approach 1:
The patent changes the voltage parameter from high voltage (20V) to low voltage (3.3V) operation by using a transistor with a wide band gap semiconductor material as the switching element. This material enables effective switching at lower voltages, eliminating the need for high voltage charge accumulation while maintaining data retention capability through controlled charge storage in the capacitor.
Solution Approach 2:
The patent replaces the traditional flash memory mechanism (high voltage tunneling into floating gate) with a capacitor-based charge storage mechanism controlled by a low-voltage transistor. This substitution eliminates the need for high voltage stress and associated power consumption while achieving the same data retention function.
2Productivity
If high voltage is applied to erase data from floating gate, then data erasure capability is improved, but rewrite frequency is limited due to gate insulating film deterioration
Solution Approach 1:
The patent changes the voltage parameter from high voltage (20V) to low voltage (3.3V) operation by using a transistor with a wide band gap semiconductor material as the switching element. This material enables effective switching at lower voltages, eliminating the need for high voltage charge accumulation while maintaining data retention capability through controlled charge storage in the capacitor.
Solution Approach 2:
The patent replaces the traditional flash memory mechanism (high voltage tunneling into floating gate) with a capacitor-based charge storage mechanism controlled by a low-voltage transistor. This substitution eliminates the need for high voltage stress and associated power consumption while achieving the same data retention function.
3Duration of action of stationary object
If transistor off-state current is reduced to extend data retention period, then data retention period is improved, but threshold voltage control becomes more difficult
Solution Approach 1:
The patent employs a composite gate structure with two gate electrodes (first gate electrode and second gate electrode) that can independently control the transistor. The first gate electrode controls the threshold voltage while the second gate electrode controls the off-state current, allowing simultaneous optimization of both parameters through the composite gate system.
Solution Approach 2:
The patent divides the single gate control function into two separate gate electrodes. The first gate electrode is dedicated to threshold voltage control for switching operation, while the second gate electrode is dedicated to off-state current control for data retention. This segmentation allows independent optimization of each function without compromise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces power consumption, extends data retention periods, and increases the number of rewrite cycles by minimizing off-state current and gate insulating film deterioration.
Implementation Method 1
the channel formation region includes a semiconductor material whose intrinsic carrier density is lower than that of silicon
Implementation Method 2
Each flash memory has a transistor which functions as a memory element in each memory cell. Further, the transistor which functions as a memory element has an electrode for accumulating electrical charge that is called a floating gate between a gate electrode and a semiconductor film serving as an active layer. Accumulation of electrical charge in the floating gate enables data retention.
Data Source
AI summary
A memory device in which data can be retained for a long time is provided. The memory device includes a memory element and a transistor which functions as a switching element for controlling supply, storage, and release of electrical charge in the memory element. The transistor includes a second gate electrode for controlling the threshold voltage in addition to a normal gate electrode. Further, the off-state current of the transistor is extremely low because an active layer thereof includes an oxide semiconductor. In the memory device, data is stored not by injection of electrical charge to a floating gate surrounded by an insulating film at high voltage but by control of the amount of electrical charge of the memory element through the transistor whose off-state current is extremely low.