Signal Processing Circuit Using Oxide Semiconductor Memory Cells
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Solution Overview
Problem
Current signal processing circuits face challenges in reducing power consumption, particularly due to off-state current in SRAMs and the complexity of manufacturing nonvolatile memory devices, and the inefficiency of stopping power supply for short periods to conserve energy.
Innovation Solution
Incorporating a memory device with memory cells using a transistor with a semiconductor material having a wider band gap than silicon, such as oxide semiconductors like indium gallium zinc oxide (IGZO), which has a low off-state current, allowing for efficient charge retention and reduced power consumption by acting as a switching element for charge supply, retention, and discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a volatile memory device (SRAM) is used for cache, then data access speed is improved, but power consumption increases due to off-state current
Solution Approach 1:
The patent combines volatile memory (SRAM) and nonvolatile memory (NRAM) into a single hybrid cache structure. The SRAM provides fast data access while the NRAM maintains data retention without power, merging the advantages of both memory types to reduce overall power consumption while maintaining access speed performance.
Solution Approach 2:
The patent implements periodic power supply control where power is supplied to the SRAM portion only when data access is required, and power is cut off when data is not being accessed. This periodic action reduces average power consumption while maintaining fast access capability when needed.
2Use of energy by moving object
If power supply is stopped to reduce power consumption, then energy savings are achieved, but data is lost
Solution Approach 1:
The patent merges volatile and nonvolatile memory functionalities in a hybrid cache structure where the NRAM portion retains data even when power is stopped, while the SRAM portion provides fast access when power is supplied. This combination enables power stoppage without data loss.
Solution Approach 2:
The NRAM acts as an intermediary between the power supply and the data storage function. When power is stopped, the NRAM maintains data retention capability, serving as a mediator that decouples the data retention function from continuous power supply requirements.
3Loss of information
If external memory device is used for data backup, then data retention is improved, but access speed deteriorates
Solution Approach 1:
The patent nests the NRAM data retention function within the cache structure itself, rather than using external memory devices. The hybrid cache integrates both fast access (SRAM) and data retention (NRAM) capabilities in a single nested architecture, eliminating the need for external memory backup while maintaining fast access speeds.
4Loss of information
If nonvolatile memory device is used around volatile memory device, then data retention is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges SRAM and NRAM fabrication processes into a unified manufacturing flow. By integrating the manufacturing of both memory types in a single process sequence with shared process steps, the patent reduces overall manufacturing complexity compared to separate fabrication processes.
Solution Approach 2:
The patent utilizes parameter changes in the fabrication process, such as adjusting deposition conditions and heat treatment parameters, to form both SRAM and NRAM structures using similar process equipment and methodologies, thereby simplifying the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively minimizes power consumption in signal processing circuits by reducing off-state current and enabling the temporary stoppage of power supply without data loss, thus enhancing energy efficiency and simplifying the manufacturing process.
Implementation Method 1
a transistor which functions as a switching element for controlling supply, retention, and discharge of charge in the memory element
Data Source
AI summary
It is an object to provide a signal processing circuit for which a complex manufacturing process is not necessary and whose power consumption can be suppressed. In particular, it is an object to provide a signal processing circuit whose power consumption can be suppressed by stopping the power supply for a short time. The signal processing circuit includes a control circuit, an arithmetic unit, and a buffer memory device. The buffer memory device stores data sent from the main memory device or the arithmetic unit in accordance with an instruction from the control unit; the buffer memory device comprises a plurality of memory cells; and the memory cells each include a transistor including an oxide semiconductor in a channel formation region and a memory element to which charge whose amount depends on a value of the data is supplied via the transistor.