Stacked Oxide Semiconductor Transistors with Stress Balancing

The patent divides the semiconductor device into multiple stacked layers (first layer with first transistor, second layer, third layer with second transistor), separating different transistor structures vertically. This segmentation allows independent optimization of each layer's stress characteristics and impurity barriers, resolving the contradiction between high integration and reliability by enabling dense packaging while maintaining individual transistor quality through isolated barrier films in each layer.

The patent employs composite material structures combining oxide semiconductors with barrier films having specific stress characteristics. The barrier films are selected to have internal stress opposite in sign to that of the oxide semiconductor layers, creating a composite structure where tensile and compressive stresses balance each other. This composite approach prevents warpage and maintains transistor reliability while enabling high-density integration through the stacked configuration.

The barrier films in the patent serve multiple functions simultaneously: they act as impurity diffusion barriers, provide internal stress compensation opposite to the oxide semiconductor layers, and serve as structural separation layers in the stacked configuration. This multi-functionality reduces the need for separate dedicated components, thereby improving reliability against impurity diffusion while minimizing the increase in device complexity.

The patent merges the functions of impurity barrier films and stress compensation layers into a single integrated barrier film structure within each stacked layer. By combining these functions in one element rather than using separate films, the patent achieves effective impurity diffusion prevention and stress management without proportionally increasing structural complexity, thus resolving the contradiction between reliability improvement and device complexity.