Oxide Semiconductor Transistor with Surrounded Gate for Low Parasitic Capacitance
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Solution Overview
Problem
Current transistors with oxide semiconductors face challenges in achieving low parasitic capacitance, high frequency characteristics, and stable electric properties while maintaining low off-state current and high speed operation.
Innovation Solution
A semiconductor device design incorporating an oxide semiconductor with specific conductor and insulator layers, including multi-layer films that prevent oxygen passage, and a gate electrode structure with a surrounded channel configuration to reduce parasitic capacitance and enhance electric characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional transistor structure is used, then manufacturing is simpler, but parasitic capacitance is high and frequency characteristics are poor
Solution Approach 1:
The transistor structure is divided into multiple functional layers including gate electrode, gate insulator, semiconductor layer, source/drain electrodes, and interlayer insulators. This segmentation allows optimization of each layer's properties to reduce parasitic capacitance while maintaining manufacturability through standardized layering processes
Solution Approach 2:
The invention transitions from planar transistor structures to three-dimensional configurations with stacked layers and varied electrode arrangements. This dimensional change enables reduced parasitic capacitance by increasing separation between conductive elements while maintaining compact footprint for manufacturing
2Reliability
If oxide semiconductor transistors are used, then off-state current is reduced, but achieving high frequency characteristics and low parasitic capacitance is difficult
Solution Approach 1:
The invention optimizes physical parameters including layer thicknesses, material compositions, and structural dimensions of the oxide semiconductor transistor. By carefully controlling these parameters, the device achieves low parasitic capacitance and high frequency characteristics while maintaining the inherent low off-state current property of oxide semiconductors
Solution Approach 2:
The transistor employs composite material structures combining oxide semiconductor layers with metal electrodes, insulating materials, and conductive interlayers. This composite approach enables simultaneous optimization of electrical properties for low off-state current and high frequency performance while managing parasitic capacitance
3Stability of the object's composition
If multi-layer films are added to prevent oxygen passage, then electric characteristics stability is improved, but device complexity increases
Solution Approach 1:
Oxygen barrier layers are incorporated into the transistor structure during the manufacturing process to prevent oxygen diffusion that would degrade electric characteristics. This preliminary protective action ensures long-term stability of the oxide semiconductor properties without requiring complex post-processing
Solution Approach 2:
Interlayer insulators and barrier films serve as intermediary layers between functional components, preventing direct interaction that could cause degradation. These intermediary layers stabilize electric characteristics by isolating sensitive oxide semiconductor regions from oxygen-containing environments while maintaining structural integrity
Data Source
AI summary
A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween. The second insulator has an opening and a side surface of the second insulator overlaps with a side surface of the first conductor in the opening with the first insulator positioned therebetween. Part of a surface of the second conductor and part of a surface of the third conductor are in contact with the first insulator in the opening. The oxide semiconductor overlaps with the second conductor and the third conductor.