Oxide Semiconductor Transistor with C-Axis Aligned Crystal Structure
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving favorable electrical characteristics, high switching speed, and miniaturization with low off-state current and high on-state current, particularly in transistors using oxide semiconductors with c-axis aligned crystal structures.
Innovation Solution
A semiconductor device with a transistor structure that includes an oxide semiconductor, a gate electrode, and a gate insulator, where the oxide semiconductor has regions with specific configurations and compositions to enhance carrier control and reduce parasitic capacitance, allowing for high on-state current and low off-state current, and is fabricated using techniques like sputtering and CVD methods to ensure purity and crystallinity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor with c-axis aligned crystal structure is used in transistor active layer, then off-state current is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent changes the crystal structure parameters of the oxide semiconductor from amorphous or randomly oriented to c-axis aligned crystal structure. This parameter change in the material's crystalline orientation enables extremely low off-state current while maintaining compatibility with existing sputtering manufacturing processes through controlled deposition conditions
Solution Approach 2:
The patent applies local quality by creating specific regions within the oxide semiconductor layer with different crystal orientations and properties. The channel formation region has c-axis aligned crystal structure for low off-state current, while other regions may have different characteristics optimized for their specific functions
2Productivity
If transistor is miniaturized for high density integration, then integration density increases, but electrical characteristics deteriorate
Solution Approach 1:
The patent changes the material parameters by using oxide semiconductor with c-axis aligned crystal structure, which maintains favorable electrical characteristics even in miniaturized transistors. The crystalline structure provides stable electrical properties that prevent deterioration during scaling
Solution Approach 2:
The patent uses composite material structure combining oxide semiconductor with specific crystal structure, gate insulator, and electrode materials. This composite approach optimizes each layer's properties to maintain electrical characteristics in miniaturized devices
3Speed
If switching speed is increased for high-speed operation, then operation speed improves, but off-state current increases
Solution Approach 1:
The patent changes the carrier mobility parameter by using c-axis aligned crystal structure oxide semiconductor, which provides high carrier mobility for fast switching while maintaining the material's intrinsic low off-state current characteristics through its band structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables transistors with excellent subthreshold characteristics, extremely low off-state current, and high on-state current, suitable for miniaturization and high-speed operation, while maintaining stability and reliability.
Implementation Method 1
fabricated using techniques like sputtering and CVD methods to ensure purity and crystallinity
Implementation Method 2
fabricated using techniques like sputtering and CVD methods to ensure purity and crystallinity
Data Source
AI summary
A transistor having favorable electrical characteristics. A transistor suitable for miniaturization. A transistor having a high switching speed. One embodiment of the present invention is a semiconductor device that includes a transistor. The transistor includes an oxide semiconductor, a gate electrode, and a gate insulator. The oxide semiconductor includes a first region in which the oxide semiconductor and the gate electrode overlap with each other with the gate insulator positioned therebetween. The transistor has a threshold voltage higher than 0 V and a switching speed lower than 100 nanoseconds.