Oxide Semiconductor Transistor Structure for Nonvolatile Memory
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Solution Overview
Problem
Current semiconductor memory devices face challenges such as high power consumption, limited data retention, and frequent refresh operations in volatile memory, while nonvolatile memory devices like flash memory suffer from durability issues and slow writing/erasing speeds due to gate insulating layer deterioration.
Innovation Solution
A semiconductor device structure incorporating a first and second transistor with a semiconductor layer using an oxide semiconductor material and a conductive layer, allowing for low-resistance regions and reduced off-state current, enabling long-term data retention without refresh operations and high-speed data writing/erasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If flash memory is used for nonvolatile storage, then data holding time is extremely long and refresh operations are not needed, but the gate insulating layer deteriorates due to tunneling current after a predetermined number of writing operations
Solution Approach 1:
The patent extracts the harmful tunneling current generation mechanism from the memory element structure by replacing the conventional floating gate with a charge trap memory element that uses trap states within the bandgap of the semiconductor layer, eliminating the need for high-voltage tunneling while maintaining nonvolatile data storage capability
Solution Approach 2:
The patent changes the operational parameters by using a semiconductor layer with a wide bandgap (such as silicon carbide or diamond) that allows data storage through trap states at lower energy levels, avoiding the high-voltage tunneling current that causes gate insulating layer deterioration in conventional flash memory
2Duration of action of stationary object
If flash memory is used for nonvolatile storage, then data holding time is extremely long, but high voltage is necessary to inject or remove electric charge and writing/erasing speed is relatively slow
Solution Approach 1:
The patent changes the operational voltage parameters by using a semiconductor layer with a wide bandgap that enables charge storage through trap states at lower energy levels, allowing data writing and erasing at lower voltages while maintaining nonvolatile storage capability, thus improving writing/erasing speed
3Speed
If volatile memory (DRAM) is used, then writing operation is simple and speed is fast, but power consumption is high due to frequent refresh operations
Solution Approach 1:
The patent implements a memory element that requires no refresh operations (excessive action beyond what volatile memory needs) by using a charge trap mechanism that naturally retains charge indefinitely, achieving both the simplicity of volatile memory operation and the power efficiency of nonvolatile memory
Solution Approach 2:
The charge trap memory element is self-sufficient in maintaining stored data without requiring external refresh operations, as the trapped charges remain stable in the trap states within the bandgap of the semiconductor layer, eliminating continuous power consumption for data retention
4Use of energy by stationary object
If SRAM is used for volatile storage, then refresh operation is not needed, but cost per storage capacity is higher due to complex circuit structure
Solution Approach 1:
The patent extracts the complex flip-flop circuit structure from the memory element and replaces it with a simpler charge trap memory element that achieves nonvolatile storage without requiring complex regenerative circuits, thus reducing device complexity while maintaining no-refresh operation
Solution Approach 2:
The charge trap memory element uses a simpler, more cost-effective structure compared to SRAM flip-flops, achieving comparable or superior functionality (nonvolatile storage plus no refresh needed) with reduced manufacturing complexity and lower cost per storage capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a semiconductor device with reduced power consumption, extended data retention, and high-speed operation, eliminating the need for refresh operations and avoiding gate insulating layer deterioration, thus enhancing integration and storage capacity.
Implementation Method 1
a transistor including an oxide semiconductor has an off-state current that is smaller than or equal to 1×10^-21 A; thus, the transistor can hold data for a long time
Implementation Method 2
The gate electrode of the first transistor serves as one of a source electrode and a drain electrode of the second transistor
Data Source
AI summary
The degree of integration of a semiconductor device is enhanced and the storage capacity per unit area is increased. The semiconductor device includes a first transistor provided in a semiconductor substrate and a second transistor provided over the first transistor. In addition, an upper portion of a semiconductor layer of the second transistor is in contact with a wiring, and a lower portion thereof is in contact with a gate electrode of the first transistor. With such a structure, the wiring and the gate electrode of the first transistor can serve as a source electrode and a drain electrode of the second transistor, respectively. Accordingly, the area occupied by the semiconductor device can be reduced.