Oxide Semiconductor Transistor Withstand Voltage via Segmented Channel
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Solution Overview
Problem
In active driving type liquid crystal and organic EL display units, parasitic capacitance at the intersection region between the gate electrode and source-drain electrodes of TFTs can lead to signal voltage variations, deteriorating image quality and increasing the probability of short circuits, which reduces manufacturing yield.
Innovation Solution
A semiconductor device with a transistor structure that includes a gate electrode, an oxide semiconductor film with a first overlapping region, a low-resistance region, and a first separation region between the low-resistance region and the overlapping region, which adjusts the distance between the low-resistance regions to improve withstand voltage characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a self-aligned structure is used to reduce parasitic capacitance, then image quality improves, but withstand voltage characteristics deteriorate
Solution Approach 1:
The channel region is segmented into three distinct parts: a first low-resistance region, an intrinsic region, and a second low-resistance region. This segmentation allows the channel to maintain low parasitic capacitance while the intrinsic region provides sufficient length for withstanding voltage, resolving the contradiction between reducing parasitic capacitance and maintaining withstand voltage characteristics.
Solution Approach 2:
Different regions of the channel are given different electrical properties: the first and second low-resistance regions have high carrier concentration for low contact resistance, while the intrinsic region has low carrier concentration for high breakdown voltage. This local differentiation allows each region to optimize for its specific function, achieving both low parasitic capacitance and high withstand voltage.
2Productivity
If the overlapping region is shortened to improve pixel density, then productivity increases, but withstand voltage characteristics worsen
Solution Approach 1:
By segmenting the channel into low-resistance regions and an intrinsic region, the patent allows the overlapping region to be shortened for higher pixel density while the intrinsic region maintains sufficient length for voltage withstanding. The low-resistance regions compensate for the shortened channel by providing efficient current paths.
Solution Approach 2:
The patent changes the carrier concentration parameter along the channel length, creating high-carrier-concentration low-resistance regions at the contacts and a low-carrier-concentration intrinsic region in the middle. This parameter variation allows short overlapping regions to maintain both high pixel density and adequate withstand voltage through the intrinsic region.
Data Source
AI summary
Provided is a semiconductor device that includes a transistor. The transistor includes: a gate electrode; an oxide semiconductor film facing the gate electrode and including a first overlapping region that is overlapped with the gate electrode; a low-resistance region provided in the oxide semiconductor film; and a first separation region provided between the low-resistance region and the first overlapping region.