Oxide TFT Substrate Buffer Layer for Surface Defect Prevention
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Solution Overview
Problem
Hydrogenated amorphous silicon used in thin-film transistor (TFT) substrates for LCDs has low charge mobility and on/off current ratio, leading to signal delay and afterimage issues due to leakage photocurrent, and when oxide semiconductors are used, material reactions can cause surface defects in data wiring.
Innovation Solution
A TFT substrate design featuring gate wiring on an insulating substrate with oxide active layer patterns made from materials like indium zinc oxide and hafnium or gallium, and buffer layer patterns from titanium nitride or molybdenum, where the Gibbs free energy of the oxide materials ensures stable contact and reduced reaction, thereby improving electrical properties and reducing appearance defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hydrogenated amorphous silicon is used for active layer patterns, then the TFT substrate can be manufactured with conventional processes, but charge mobility and on/off current ratio are low leading to signal delay and afterimage issues
Solution Approach 1:
The patent changes the material parameter from hydrogenated amorphous silicon to oxide semiconductor, fundamentally altering the electrical properties including charge mobility and on/off current ratio. This material substitution resolves the electrical property limitations while maintaining compatibility with existing TFT manufacturing processes
Solution Approach 2:
The patent employs a composite structure combining oxide semiconductor active layer patterns with buffer layer patterns and data wiring. This multi-layer composite approach enables improved electrical properties while managing material reactions through the buffer layer interface
2Reliability
If oxide semiconductors are used for active layer patterns, then charge mobility and on/off current ratio are improved, but material reactions with data wiring cause surface defects
Solution Approach 1:
The patent introduces a buffer layer pattern as an intermediary between the oxide semiconductor active layer and the data wiring. This buffer layer prevents direct material reactions while maintaining electrical functionality, thereby preventing surface defects such as protrusions on the data wiring
Solution Approach 2:
The buffer layer acts as a sacrificial or protective layer that can be optimized for cost and performance. It serves its protective function during device operation and manufacturing, preventing harmful reactions between oxide semiconductor and data wiring materials
3Speed
If materials with low resistance are used for data wiring, then signal delay is reduced, but material reactions with oxide active layer patterns cause surface protrusions
Solution Approach 1:
The buffer layer pattern serves as a protective intermediary between the low-resistance data wiring and the oxide semiconductor active layer. This prevents material reactions that would cause surface protrusions while allowing the low-resistance wiring to function effectively for fast signal transmission
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed TFT substrate exhibits enhanced charge mobility and reduced leakage currents, preventing afterimages and surface defects, while maintaining a high aperture ratio and stability of the oxide active layer patterns.
Implementation Method 1
wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material
Data Source
AI summary
A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.