Oxide Semiconductor TFT Buffer Layer Design
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Solution Overview
Problem
Existing thin film transistor technologies face challenges in maintaining mechanical and viewing characteristics, particularly with amorphous silicon, which has low charge mobility, and polysilicon, which has high manufacturing costs and complexity, while oxide semiconductors offer higher mobility but require improved manufacturing processes.
Innovation Solution
A thin film transistor array panel is designed with a substrate, data line, buffer layer, and oxide semiconductor layer, where the buffer layer has distinct thickness regions to protect the oxide semiconductor and prevent damage during manufacturing, and a light blocking layer is used to prevent channel characteristic deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If amorphous silicon is used for the semiconductor layer, then the manufacturing process is simple, but the charge mobility is low
Solution Approach 1:
The patent changes the material parameter from conventional silicon (amorphous or polysilicon) to oxide semiconductor, fundamentally altering the electrical properties and charge mobility characteristics while maintaining compatibility with existing manufacturing processes
2Reliability
If polysilicon is used for the semiconductor layer, then the charge mobility is high, but the manufacturing cost and process complexity increase
Solution Approach 1:
The patent transitions from polysilicon to oxide semiconductor material, changing the fundamental material parameter to achieve high charge mobility without requiring the complex multi-stage crystallization processes needed for polysilicon
Solution Approach 2:
The oxide semiconductor layer can be formed using simpler, more cost-effective deposition techniques compared to polysilicon crystallization, reducing manufacturing costs while achieving the desired electrical performance
3Ease of manufacture
If the buffer layer is removed from areas spaced apart from the gate, then the manufacturing process is simplified, but the oxide semiconductor layer may be damaged during etching
Solution Approach 1:
The buffer layer is removed in advance from areas that will not overlap with the gate electrode or gate insulating pattern, preventing potential damage to the oxide semiconductor layer during subsequent etching processes while simplifying the overall manufacturing process
Solution Approach 2:
The buffer layer serves as a protective intermediary structure that is selectively removed to protect the oxide semiconductor layer from damage during manufacturing processes
Data Source
AI summary
A thin film transistor array panel includes a substrate; a data line disposed on the substrate; a buffer layer disposed on the substrate and spaced apart from the data line in a plan view; a thin film transistor disposed on the buffer layer, the thin film transistor including an oxide semiconductor layer; and a pixel electrode connected to the thin film transistor.


